V devices are designed to simultaneously accommodate the shrinking power consumption,
cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and
cost-sensitive applications.
Enhanced with integrated transceivers and hard memory controllers, the Cyclone V devices are suitable
for applications in the industrial, wireless and wireline, military, and automotive markets.
Cyclone V Device Handbook: Known Issues
Lists the planned updates to the
Cyclone V Device Handbook
chapters.
Related Information
Key Advantages of Cyclone V Devices
Table 1: Key Advantages of the Cyclone V Device Family
Advantage
Supporting Feature
Lower power consumption
• Built on TSMC's 28 nm low-power (28LP) process technology
and includes an abundance of hard intellectual property (IP)
blocks
• Up to 40% lower power consumption than the previous
generation device
• 8-input adaptive logic module (ALM)
• Up to 13.59 megabits (Mb) of embedded memory
• Variable-precision digital signal processing (DSP) blocks
• 3.125 gigabits per second (Gbps) and 6.144 Gbps transceivers
• Hard memory controllers
• Tight integration of a dual-core ARM Cortex-A9 MPCore
processor, hard IP, and an FPGA in a single Cyclone V system-
on-a-chip (SoC)
• Supports over 128 Gbps peak bandwidth with integrated data
coherency between the processor and the FPGA fabric
Improved logic integration and
differentiation capabilities
Increased bandwidth capacity
Hard processor system (HPS) with
integrated ARM
®
Cortex
™
-A9
MPCore processor
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trademarks or service marks are the property of their respective holders as described at
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Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
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