Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MCIMX35SR2AEC
Rev. 10, 06/2012
IMX35
i.MX35 Applications
Processors for
Automotive Products
Package Information
Plastic Package
Case 5284 17 x 17 mm, 0.8 mm Pitch
Ordering Information
See
Table 1 on page 3
for ordering information.
1
Introduction
The i.MX35 Auto Application Processor family is
designed for automotive infotainment and navigation
applications. These processors are AECQ100 Grade 3
qualified and rated for ambient operating temperatures
up to 85
°C.
Based on an ARM11 microprocessor core running at up
to 532 MHz, the device offers the following features and
optimized system cost for the target applications.
• Audio connectivity and telematics:
— Compressed audio playback from storage
devices (CD, USB, HDD or SD card)
— PlayFromDevice (1-wire and 2-wire
support) for portable media players
— iPod/iPhone control and playback
— High-speed CD ripping to USB, SD/MMC
or HDD for virtual CD changer
— Audio processing for hands-free telephony:
Bluetooth, AEC/NS, and microphone beam
forming
— Speech recognition
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Functional Description and Application Information. . . . . . 4
2.1. Application Processor Domain Overview . . . . . . . . . 5
2.2. Shared Domain Overview . . . . . . . . . . . . . . . . . . . . 6
2.3. Advanced Power Management Overview . . . . . . . . 6
2.4. ARM11 Microprocessor Core. . . . . . . . . . . . . . . . . . 6
2.5. Module Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3. Signal Descriptions: Special Function Related Pins . . . . 12
4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1. i.MX35 Chip-Level Conditions . . . . . . . . . . . . . . . . 13
4.2. Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.3. Supply Power-Up/Power-Down Requirements and
Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.4. Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.5. Power Characteristics . . . . . . . . . . . . . . . . . . . . . . 19
4.6. Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . 20
4.7. I/O Pin DC Electrical Characteristics . . . . . . . . . . . 21
4.8. I/O Pin AC Electrical Characteristics . . . . . . . . . . . 24
4.9. Module-Level AC Electrical Specifications . . . . . . . 30
5. Package Information and Pinout . . . . . . . . . . . . . . . . . . 131
5.1. MAPBGA Production Package 1568-01, 17
×
17 mm,
0.8 Pitch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
5.2. MAPBGA Signal Assignments . . . . . . . . . . . . . . . 133
6. Product Documentation . . . . . . . . . . . . . . . . . . . . . . . . . 145
7. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
© Freescale Semiconductor, Inc., 2010. All rights reserved.
•
A/V connectivity and navigation:
— Includes audio connectivity and telematics features
— Map display and route calculation
— QVGA video decode, WVGA video display
— Sophisticated graphical user interface
The i.MX35 processor takes advantage of the ARM1136JF-S™ core running at 532 MHz that is boosted
by a multilevel cache system, and features peripheral devices such as an autonomous image processing
unit, a vector floating point (VFP11) co-processor, and a RISC-based DMA controller.
The i.MX35 supports connections to various types of external memories, such as SDRAM, mobile DDR
and DDR2, SLC and MLC NAND Flash, NOR Flash and SRAM. The device can be connected to a variety
of external devices such as high-speed USB2.0 OTG, ATA, MMC/SDIO, and Compact Flash.
1.1
Features
The i.MX35 is designed for automotive infotainment video-enabled applications. It provides low-power
solutions for applications demanding high-performance multimedia and graphics.
The i.MX35 is based on the ARM1136 platform, which has the following features:
• ARM1136JF-S processor, version r1p3
• 16-Kbyte L1 instruction cache
• 16-Kbyte L1 data cache
• 128-Kbyte L2 cache, version r0p4
• 128 Kbytes of internal SRAM
• Vector floating point unit (VFP11)
To boost multimedia performance, the following hardware accelerators are integrated:
• Image processing unit (IPU)
• OpenVG 1.1 graphics processing unit (GPU) (not available for the MCIMX351)
The MCIMX35 provides the following interfaces to external devices (some of these interfaces are muxed
and not available simultaneously):
• 2 controller area network (CAN) interfaces
• 2 SDIO/MMC interfaces, 1 SDIO/CE-ATA interface (CE-ATA is not available for the MCIMX351)
• 32-bit mobile DDR, DDR2 (4-bank architecture), and SDRAM (up to 133 MHz)
• 2 configurable serial peripheral interfaces (CSPI) (up to 52 Mbps each)
• Enhanced serial audio interface (ESAI)
• 2 synchronous serial interfaces (SSI)
• Ethernet MAC 10/100 Mbps
• 1 USB 2.0 host with ULPI interface or internal full-speed PHY. Up to 480 Mbps if external HS
PHY is used.
• 1 USB 2.0 OTG (up to 480 Mbps) controller with internal high-speed OTG PHY
i.MX35 Applications Processors for Automotive Products, Rev. 10
2
Freescale Semiconductor
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Flash controller—MLC/SLC NAND and NOR
GPIO with interrupt capabilities
3 I
2
C modules (up to 400 Kbytes each)
JTAG
Key pin port
Media local bus (MLB) interface
Asynchronous sample rate converter (ASRC)
1-Wire
Parallel camera sensor (4/8/10/16-bit data port for video color models: YCC, YUV, 30 Mpixels/s)
Parallel display (primary up to 24-bit, 1024 x 1024)
Parallel ATA (up to 66 Mbytes) (not available for the MCIMX351)
PWM
SPDIF transceiver
3 UART (up to 4.0 Mbps each)
1.2
Ordering Information
Table 1. Ordering Information
Table 1
provides the ordering information for the i.MX35 processors for automotive applications.
Description
Part Number
Silicon
Revision
2.0
2.0
2.0
2.0
2.0
2.0
2.1
2.1
2.1
2.1
2.1
2.1
2
Package
1
Speed
Operating
Temperature
Range (°C)
–40 to 85
–40 to 85
–40 to 85
–40 to 85
–40 to 85
–40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Signal Ball
Map
Locations
Table 94
Table 94
Table 94
Table 94
Table 94
Table 94
Table 95
Table 95
Table 95
Table 95
Table 95
Table 95
Table 94
Ball Map
i.MX351
i.MX351
i.MX355
i.MX355
i.MX356
i.MX356
i.MX351
i.MX351
i.MX355
i.MX355
i.MX356
i.MX356
i.MX356
1
2
MCIMX351AVM4B
MCIMX351AVM5B
MCIMX355AVM4B
MCIMX355AVM5B
MCIMX356AVM4B
MCIMX356AVM5B
MCIMX351AJQ4C
MCIMX351AJQ5C
MCIMX355AJQ4C
MCIMX355AJQ5C
MCIMX356AJQ4C
MCIMX356AJQ5C
SCIMX356BVMB
5284
5284
5284
5284
5284
5284
5284
5284
5284
5284
5284
5284
5284
400 MHz
532 MHz
2
400 MHz
532 MHz
2
400 MHz
532 MHz
2
400MHz
532MHz
2
400MHz
532MHz
2
400MHz
532MHz
2
532MHz
Table 96
Table 96
Table 96
Table 96
Table 96
Table 96
Table 97
Table 97
Table 97
Table 97
Table 97
Table 97
Table 96
Case 5284 is RoHS-compliant, lead-free, MSL = 3, 1.
532 MHz rated devices meet all specifications of 400 MHz rated devices. A 532 MHz device can be substituted in place of a
400 MHz device.
i.MX35 Applications Processors for Automotive Products, Rev. 10
Freescale Semiconductor
3
The ball map for silicon revision 2.1 is different than the ballmap for silicon revision 2.0. The layout for
each revision is not compatible, so it is important that the correct ballmap be used to implement the layout.
See
Section 5, “Package Information and Pinout.”
Table 2
shows the functional differences between the different parts in the i.MX35 family.
Table 2. Functional Differences in the i.MX35 Parts
Module
I2C (3)
CSPI (2)
SSI/I2S (2)
ESAI
SPDIF I/O
USB HS Host
USB OTG
FlexCAN (2)
MLB
Ethernet
1-Wire
KPP
SDIO/MMC (2)
SDIO/Memory Stick
External Memory Controller (EMC)
JTAG
PATA
CE-ATA
Image Processing Unit (IPU) (inversion
and rotation, pre- and post-processing,
camera interface, blending, display
controller)
Open VG graphics acceleration (GPU)
MCIMX351
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
—
—
MCIMX353
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
MCIMX355
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
MCIMX356
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
MCIMX357
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
Yes
—
Yes
Yes
i.MX35 Applications Processors for Automotive Products, Rev. 10
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Freescale Semiconductor
1.3
Block Diagram
Figure 1
is the i.MX35 simplified interface block diagram.
DDR2/SDDR
RAM
NOR
Flash/
PSRAM
NAND
Flash
Camera
Sensor
LCD Display 1 External Graphics
Accelerator
LCD Display 2
External Memory
Interface (EMI)
Image
Processing Unit
(IPU)
Smart
DMA
ARM11
Platform
ARM1136JF-S
VFP
L1 I/D cache
L2 cache
AVIC
MAX
AIPS (2)
ETM
ARM1136 Platform Peripherals
SSI
AUDMUX
I2C(3)
UART(2)
CSPI
eSDHC(3)
CAN(2)
MLB
ECT
IOMUX
GPIO(3)
EPIT
HS USBOTG
HS USBOTGPHY
SPBA
HS USBHost
FS USBPHY
GPU 2D
Peripherals
MSHC
ESAI
SPDIF
SSI
ASRC
UART
CSPI
ATA
FEC
Internal
Memory
IIM
RTICv3
RNGC
SCC
KPP
PWM
Timers
RTC
WDOG
GPT
3 FuseBox
OWIRE
Audio/Power
Management
JTAG
Bluetooth
MMC/SDIO
or WLAN
Keypad
Connectivity
Access
Figure 1. i.MX35 Simplified Interface Block Diagram
2
Functional Description and Application Information
The i.MX35 consists of the following major subsystems:
• ARM1136 Platform—AP domain
• SDMA Platform and EMI—Shared domain
2.1
Application Processor Domain Overview
The applications processor (AP) and its domain are responsible for running the operating system and
applications software, providing the user interface, and supplying access to integrated and external
peripherals. The AP domain is built around an ARM1136JF-S core with 16-Kbyte instruction and data L1
caches, an MMU, a 128-Kbyte L2 cache, a multiported crossbar switch, and advanced debug and trace
interfaces.
i.MX35 Applications Processors for Automotive Products, Rev. 10
Freescale Semiconductor
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