EFM32ZG108F8-QFN24 datasheet, PDF

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EFM32ZG108F8-QFN24: Descriptionarm microcontrollers - mcu 8kb flash 2kb ram; Categorysemiconductor Other integrated circuit (IC); File Size555KB，8 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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EFM32ZG108F8-QFN24 Overview

arm microcontrollers - mcu 8kb flash 2kb ram

EFM32ZG108F8-QFN24 Parametric

Parameter Name	Attribute value
Manufacture	Silicon Laboratories
Product Category	ARM Microcontrollers - MCU
RoHS	Yes
Core	ARM Cortex M0
Data Bus Width	32 bi
Program Memory Size	8 kB
Data RAM Size	2 kB
Operating Supply Voltage	3 V
Mounting Style	SMD/SMT
Data RAM Type	RAM
Interface Type	I2C, SPI, UART
Number of Timers	2
Packaging	Reel
Processor Series	EFM32
Program Memory Type	Flash
Factory Pack Quantity	1000

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EFM32 Zero Gecko

EFM32ZG Errata

This document contains information on the errata of EFM32ZG. The latest available revision of this device is revision A.

For errata on older revisions, please refer to the errata history section for the device. The device revision is typically the first letter on

the line immediately under the part number on the package marking. This is typically the second or third line.

Errata effective date: April 10th, 2017.

silabs.com

| Building a more connected world.

Rev. 0.40

EFM32ZG Errata

Detailed Errata Descriptions

2. Detailed Errata Descriptions

2.1 IDAC_E101 — IDAC Output Current Degradation

Description of Errata

The current output of the IDAC might degrade over time.

Affected Conditions / Impacts

Due to an undefined shut-down state of the IDAC, powered devices that do not use the IDAC continuously might experience some

degradation in the current output over the lifetime of the device. The degradation is very small when the device is used at room tem-

perature, but the output current will fall well outside specs if the device is exposed to higher temperatures for longer periods of time.

Workaround

If the IDAC output current stability is crucial to the application, the IDAC should never be completely disabled while the device is pow-

ered. Leaving the IDAC enabled in the lowest output code setting with duty-cycling enabled consumes ~50 nA extra current and elimi-

nates the problem.

Resolution

There is currently no resolution for this issue.

2.2 DI_E103 — Flash Page Size

Description of Errata

The MEM_INFO_PAGE_SIZE value stored in the Device Information (DI) Page is incorrect.

Affected Conditions / Impacts

For devices with PROD_REV values of 23 or lower, the MEM_INFO_PAGE_SIZE register value in the Device Information Page is

incorrect.

Workaround

Use fixed flash page size of 1024 bytes.

Resolution

There is currently no resolution for this issue.

2.3 EMU_E109 — Potential Brown Out in EM2

Description of Errata

There is an error with the calibration algorithm for a voltage regulator that is active during EM2 mode.

Affected Conditions / Impacts

There is an error with the calibration algorithm for a voltage regulator that is active during EM2 mode. This error can, in rare instances,

cause the device to brown out and reset while operating in EM2 mode.

Workaround

The issue has been corrected with an updated and validated test program. Devices with a date code greater than or equal to 1626

have been tested with the corrected test program.

Firmware can also work around this issue by writing the calibration value for the low current regulator active in EM2 to 0x6 after any

reset or wakeup from EM4. More information on this firmware workaround including example code can be found at the following KB

article URL:

http://community.silabs.com/t5/32-bit-MCU-Knowledge-Base/EMU-E109-Potential-Brown-Out-in-EM2/ta-p/176459

Resolution

The issue has been corrected with an updated and validated test program. Devices with a date code and PROD_REV greater than or

equal to 1626 and 0x8B respectively have been tested with the corrected test program.

silabs.com

| Building a more connected world.

Rev. 0.40 | 2

EFM32ZG Errata

Detailed Errata Descriptions

2.4 EMU_E110 — Potential Hard Fault when Exiting EM2

Description of Errata

The flash is powered down in EM2 to save power. Some control registers in the flash can rarely enter an invalid state upon power-on,

causing the first read of flash to be incorrect. If this occurs after exiting EM2, the core attempts to fetch the interrupt address, but the

value will be incorrect and may be invalid. In the case of an invalid value, the core will then jump to the hard fault handler for attempt-

ing to execute code from an invalid address. All subsequent reads from the flash are unaffected, and it is only the first flash read after

exit from EM2 that is potentially erroneous.

Affected Conditions / Impacts

When exiting EM2, some devices may intermittently execute code incorrectly or enter the hard fault handler instead of entering the

expected ISR associated with the wake source.

Workaround

To workaround this issue, move the interrupt vector table and interrupt service routines for EM2 wake sources to RAM and perform a

dummy read of the flash in the ISR. Additional information on the workaround and examples provided is available from the following

Knowledge Base article URL:

http://community.silabs.com/t5/32-bit-MCU-Knowledge-Base/EMU-E110-Potential-Hard-Fault-when-Exiting-EM2/ta-p/192479

This workaround will be included in v5.3.0 or later of the Gecko SDK, which will be included in the v1.1.0 Gecko SDK Suite.

Resolution

This issue will be resolved in future devices, but the date code of the fixed devices is not yet available. These devices are currently

targeted to be available in Q4 2017. The Knowledge Base article will be updated as soon as the specific date code information is

available.

2.5 PCNT_E102 — PCNT Pulse Width Filtering Does Not Work

Description of Errata

PCNT pulse width filtering does not work.

Affected Conditions / Impacts

The PCNT pulse width filter does not work as intended.

Workaround

Do not use the pulse width filter, i.e. ensure FILT = 0 in PCNTn_CTRL.

Resolution

There is currently no resolution for this issue.

silabs.com

| Building a more connected world.

Rev. 0.40 | 3

EFM32ZG Errata

Detailed Errata Descriptions

2.6 RMU_E101 — POR Calibration Initialization Issue

Description of Errata

Upon initial power-on, some devices may not be able to access flash memory above the 4 kB boundary, or some calibration registers

on some devices may not be set to their factory calibration values.

Affected Conditions / Impacts

The list of affected devices can be found in the Knowledge Base (KB) article listed under Fix/Workaround.

Some devices are sensitive to the power supply ramp during initial power-on. Specific ramp profiles on these devices can cause an

intermittent issue resulting in one of two failure modes (A) or (B):

A. Flash memory above the 4 kB boundary is inaccessible. Reads of the flash will return zeros. Write attempts will return an invalid

address error code in the MSC_STATUS register. Code execution will behave as though the memory above 4 kB was filled with zeros

until the device resets itself.

B. Some parts of the calibration initialization process do not complete successfully. On USB devices, the USB voltage regulator does

not get calibrated. Specific peripheral registers that may not be calibrated are as follows (not all registers apply to all devices):

ADC0_CAL, IDAC_CAL, DAC0_CAL, DAC0_BIASPROG, DAC0_OPACTRL, and DAC0_OPAOFFSET.

A SYSRESETREQ reset will clear either failure mode, and the device will behave normally until the next power-on event.

Workaround

Additional information including a software workaround is available from the following KB article URL:

http://community.silabs.com/t5/32-bit-MCU-Knowledge-Base/POR-calibration-initialization-issue/ta-p/154716

Resolution

Devices with a date code and PROD_REV greater than or equal to 1537 and 0x89 respectively will not have this issue.

2.7 TIMER_E103 — Capture/Compare Output is Unreliable with RSSCOIST Enabled

Description of Errata

The TIMER capture/compare output is unreliable when RSSCOIST is enabled and the clock is prescaled.

Affected Conditions / Impacts

When RSSCOIST is set and PRESC > 0 in TIMERn_CTRL, the capture/compare output value is not reliable.

Workaround

Do not use a prescaled clock, i.e. ensure PRESC = 0 in TIMERn_CTRL when RSSCOIST is enabled.

Resolution

There is currently no resolution for this issue.

silabs.com

| Building a more connected world.

Rev. 0.40 | 4

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