5CGTFD9E5F35I7N datasheet, PDF

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5CGTFD9E5F35I7N: Descriptionfpga - field programmable gate array fpga - cyclone V GT 11356 labs 560 ios; CategoryProgrammable logic devices Programmable logic; File Size827KB，37 Pages; ManufacturerAltera (Intel); Environmental Compliance

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5CGTFD9E5F35I7N Overview

fpga - field programmable gate array fpga - cyclone V GT 11356 labs 560 ios

5CGTFD9E5F35I7N Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Altera (Intel)
package instruction	BGA, BGA1152,34X34,40
Reach Compliance Code	compli
JESD-30 code	S-PBGA-B1152
length	35 mm
Configurable number of logic blocks	11356
Number of entries	560
Number of logical units	301000
Output times	560
Number of terminals	1152
Maximum operating temperature	100 °C
Minimum operating temperature	-40 °C
organize	11356 CLBS
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA1152,34X34,40
Package shape	SQUARE
Package form	GRID ARRAY
power supply	1.1,1.2/3.3,2.5 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	2.4 mm
Maximum supply voltage	1.13 V
Minimum supply voltage	1.07 V
Nominal supply voltage	1.1 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
width	35 mm

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2014.07.07

Cyclone V Device Overview

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CV-51001

The Cyclone

V devices are designed to simultaneously accommodate the shrinking power consumption,

cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and

cost-sensitive applications.

Enhanced with integrated transceivers and hard memory controllers, the Cyclone V devices are suitable

for applications in the industrial, wireless and wireline, military, and automotive markets.

Cyclone V Device Handbook: Known Issues

Lists the planned updates to the

Cyclone V Device Handbook

chapters.

Related Information

Key Advantages of Cyclone V Devices

Table 1: Key Advantages of the Cyclone V Device Family

Advantage

Supporting Feature

Lower power consumption

• Built on TSMC's 28 nm low-power (28LP) process technology

and includes an abundance of hard intellectual property (IP)

blocks

• Up to 40% lower power consumption than the previous

generation device

• 8-input adaptive logic module (ALM)

• Up to 13.59 megabits (Mb) of embedded memory

• Variable-precision digital signal processing (DSP) blocks

• 3.125 gigabits per second (Gbps) and 6.144 Gbps transceivers

• Hard memory controllers

• Tight integration of a dual-core ARM Cortex-A9 MPCore

processor, hard IP, and an FPGA in a single Cyclone V system-

on-a-chip (SoC)

• Supports over 128 Gbps peak bandwidth with integrated data

coherency between the processor and the FPGA fabric

Improved logic integration and

differentiation capabilities

Increased bandwidth capacity

Hard processor system (HPS) with

integrated ARM

Cortex

™

-A9

MPCore processor

trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as

trademarks or service marks are the property of their respective holders as described at

www.altera.com/common/legal.html.

Altera warrants performance

of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any

products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,

product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device

specifications before relying on any published information and before placing orders for products or services.

ISO

9001:2008

Registered

www.altera.com

101 Innovation Drive, San Jose, CA 95134

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