Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9S08SC4
Rev. 4, 6/2010
MC9S08SC4 8-Bit
Microcontroller Data Sheet
MC9S08SC4
948F-01
8-Bit HCS08 Central Processor Unit (CPU)
•
•
•
•
•
•
•
Up to 40 MHz HCS08 CPU (central processor unit); up
to 20 MHz bus frequency
HC08 instruction set with added BGND instruction
4 KB of FLASH with read/program/erase over full
operating voltage and temperature
256 bytes of Random-access memory (RAM)
•
Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
Peripherals
•
SCI
— Serial Communication Interface
Full-duplex non-return to zero (NRZ)
LIN master extended break generation
LIN slave extended break detection
Wake-up on active edge
TPMx
— Two 2-channel Timer/PWM modules (TPM1
and TPM2)
— 16-bit modulus or up/down counters
— Input capture, output compare, buffered
edge-aligned or center-aligned PWM
ADC
— Analog to Digital Converter
— 8-channel, 10-bit resolution
— 2.5
μs
conversion time
— Automatic compare function
— Temperature sensor
— Internal bandgap reference channel
12 general purpose I/O pins (GPIOs)
8 interrupt pins with selectable polarity
Hysteresis and configurable pull-up device on all input
pins; Configurable slew rate and drive strength on all
output pins.
16-TSSOP
4.5-5.5 V operation
C,V, M temperature ranges available, covering -40 -
125
°C
operation
—
—
—
—
On-Chip Memory
Power-Saving Modes
Two very low power stop modes
Reduced power wait mode
Oscillator (XOSC) — Loop-control Pierce oscillator;
Crystal or ceramic resonator range of 32 kHz to 38.4 kHz
or 1 MHz to 16 MHz
Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2 % resolution
and 2.0 % deviation over temperature and voltage;
supports bus frequencies from 2 MHz to 20 MHz.
Watchdog computer operating properly (COP) reset with
option to run from dedicated 1 kHz internal clock source
or bus clock
Low-voltage detection with reset or interrupt; selectable
trip points
Illegal opcode detection with reset
Illegal address detection with reset
FLASH block protect
Reset on loss of clock
Single-wire background debug interface
•
Clock Source Options
•
•
Input/Output
•
•
•
System Protection
•
•
•
•
•
•
•
Package Options
•
•
•
Operating Parameters
Development Support
Freescale reserves the right to change the detail specifications as may be required to permit
improvements in the design of its products.
© Freescale Semiconductor, Inc., 2009-2010. All rights reserved.
Table of Contents
Chapter 1
Device Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.1 MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Chapter 2
Pins and Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2.1 Device Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . .5
Chapter 3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3.2 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . . .7
3.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . .7
3.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .8
3.5 ESD Protection and Latch-Up Immunity . . . . . . . . . . . . .9
3.6 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.7 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .13
3.8 External Oscillator (XOSC) Characteristics . . . . . . . . .16
3.9 Internal Clock Source (ICS) Characteristics . . . . . . . .
3.10 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .
3.11 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.11.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . .
3.11.2 TPM Module Timing . . . . . . . . . . . . . . . . . . . . .
3.12 Flash Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . .
3.13 EMC Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.13.1 Radiated Emissions . . . . . . . . . . . . . . . . . . . . .
Chapter 4
Ordering Information and Mechanical Drawings . . . . . . . . . .
4.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1.1 Device Numbering Scheme . . . . . . . . . . . . . . .
4.2 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Mechanical Drawings. . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 5
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
19
21
21
22
23
24
24
25
25
25
25
25
29
MC9S08SC4 MCU Series Data Sheet, Rev. 4
2
Freescale Semiconductor
ARM Technology
京公网安备 11010802033920号
EEWORLD
