LY62W1024LL-55SLT datasheet, PDF

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LY62W1024LL-55SLT: DescriptionSRAM,; Categorystorage storage; File Size771KB，20 Pages; ManufacturerLyontek; Websitehttp://www.lyontek.com.tw/index.html

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LY62W1024LL-55SLT Overview

SRAM,

LY62W1024LL-55SLT Parametric

Parameter Name	Attribute value
Objectid	8322626032
package instruction	TSOP1,
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	55 ns
JESD-30 code	R-PDSO-G32
JESD-609 code	e3
length	18.4 mm
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	128KX8
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP1
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
Maximum seat height	1.2 mm
Maximum slew rate	0.06 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	8 mm

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LY62W1024

Rev. 1.11

128K X 8 BIT LOW POWER CMOS SRAM

REVISION HISTORY

Revision

Rev. 1.0

Rev. 1.1

Rev. 1.2

Rev. 1.3

Rev. 1.4

Description

Initial Issue

Revised I

SB1

LL/LLI-LLE(max)= 50/100

A

=> 20/50

A

LL/LLI-LLE(max)= 20/40

A

=> 12/30

A

Added SL Spec.

Revised typos in

FEATURES

Revised I

SB1

DR(MAX.)

Added I

SB1

values when T

= 25

℃

and T

= 40

℃

Revised

FEATURES

ORDERING INFORMATION

Lead free and green package available

Green package available

Added packing type in

ORDERING INFORMATION

Revised V

TERM

to V

and V

Deleted T

SOLDER

ABSOLUTE MAXIMUN RATINGS

Revised

PACKAGE OUTLINE DIMENSION

in page 10/11/12/13

Revised

ORDERING INFORMATION

in page 14

Deleted E Grade

Revised

PIN CONFIGURATION

in page 2

Correct

ORDERING INFORMATION

Typo.

Added top view of BGA in

PIN CONFIGURATION

Deleted E Grade in

ORDERING INFORMATION

Deleted

WRITE CYCLE

Notes :

1. WE#, CE# must be high or CE2 must be low during all address transitions

in page 7

Revised

GENERAL DESCRIPTION

in page 1

Revised

32-pin TSOP I & 36-ball TFBGA Package Outline Dimension

Issue Date

Aug.28.2005

Mar.30.2006

Nov.2.2007

May.6.2008

Mar.30.2009

Rev. 1.5

Rev. 1.6

Rev. 1.7

Rev. 1.8

Rev. 1.9

May.7.2010

Aug.30.2010

Aug.9.2011

Apr.06.2012

May.20.2016

Rev. 1.10

Rev. 1.11

Jun.28.2016

Feb.06.2017

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

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