LY62W1024PN-70LL datasheet, PDF

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LY62W1024PN-70LL: DescriptionStandard SRAM, 128KX8, 70ns, CMOS, PDIP32,; Categorystorage storage; File Size262KB，15 Pages; ManufacturerLyontek; Websitehttp://www.lyontek.com.tw/index.html

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LY62W1024PN-70LL Overview

Standard SRAM, 128KX8, 70ns, CMOS, PDIP32,

LY62W1024PN-70LL Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	107224522
package instruction	DIP, DIP32,.6
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	70 ns
I/O type	COMMON
JESD-30 code	R-PDIP-T32
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	128KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP32,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	3/5 V
Certification status	Not Qualified
Maximum standby current	0.000012 A
Minimum standby current	1.5 V
Maximum slew rate	0.05 mA
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

LY62W1024PN-70LL Preview

LY62W1024

Rev. 1.3

128K X 8 BIT LOW POWER CMOS SRAM

REVISION HISTORY

Revision

Rev. 1.0

Rev. 1.1

Rev. 1.2

Rev. 1.3

Description

Initial Issue

Revised I

SB1

LL/LLI-LLE(max)= 50/100

μA

=> 20/50

μA

LL/LLI-LLE(max)= 20/40

μA

=> 12/30

μA

Added SL Spec.

Revised typos in

FEATURES

Issue Date

Aug.28.2005

Mar.30.2006

Nov.2.2007

May.6.2008

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

LY62W1024

Rev. 1.3

128K X 8 BIT LOW POWER CMOS SRAM

GENERAL DESCRIPTION

The LY62W1024 is a 1,048,576-bit low power

CMOS static random access memory organized as

131,072 words by 8 bits. It is fabricated using very

high performance, high reliability CMOS technology.

Its standby current is stable within the range of

operating temperature.

The LY62W1024 is well designed for very low power

system applications, and particularly well suited for

battery back-up nonvolatile memory application.

The LY62W1024 operates from a single power

supply of 2.7V ~ 5.5V and all inputs and outputs are

fully TTL compatible

FEATURES

Fast access time : 35/55/70ns

Low power consumption:

Operating current : 12/10/7mA (TYP.)

Standby current : 1μA (TYP.)

Single 2.7V ~ 5.5V power supply

All outputs TTL compatible

Fully static operation

Tri-state output

Data retention voltage : 1.5V (MIN.)

Lead free and green package available

Package : 32-pin 450 mil SOP

32-pin 600 mil P-DIP

32-pin 8mm x 20mm TSOP-I

32-pin 8mm x 13.4mm STSOP

36-ball 6mm x 8mm TFBGA

PRODUCT FAMILY

Product Family

LY62W1024

LY62W1024(E)

LY62W1024(I)

Operating Temperature

0 ~ 70℃

-20 ~ 80℃

-40 ~ 85℃

Vcc Range

2.7 ~ 5.5V

Speed

35/55/70ns

FUNCTIONAL BLOCK DIAGRAM

PIN DESCRIPTION

SYMBOL

DESCRIPTION

Address Inputs

Data Inputs/Outputs

Chip Enable Inputs

Write Enable Input

Output Enable Input

Power Supply

Ground

No Connection

Vcc

Vss

A0 - A16

DQ0 – DQ7

DECODER

128Kx8

MEMORY ARRAY

CE#, CE2

WE#

OE#

A0-A16

DQ0-DQ7

I/O DATA

CIRCUIT

COLUMN I/O

CE#

CE2

WE#

OE#

CONTROL

CIRCUIT

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

LY62W1024

Rev. 1.3

128K X 8 BIT LOW POWER CMOS SRAM

PIN CONFIGURATION

A16

A14

A12

DQ0

DQ1

DQ2

Vss

SOP/P-DIP

Vcc

A15

CE2

WE#

A13

A11

OE#

A10

CE#

DQ7

DQ6

DQ5

DQ4

DQ3

A11

A13

WE#

CE2

A15

Vcc

A16

A14

A12

OE#

A10

CE#

DQ7

DQ6

DQ5

DQ4

DQ3

Vss

DQ2

DQ1

DQ0

LY62W1024

TSOP-I/STSOP

DQ4

DQ5

Vss

Vcc

DQ6

CE2

WE#

DQ0

DQ1

Vcc

Vss

DQ2

A15 DQ3

A13

A14

DQ7 OE# CE# A16

A10

A11

A12

TFBGA

ABSOLUTE MAXIMUN RATINGS*

PARAMETER

Terminal Voltage with Respect to V

Operating Temperature

Storage Temperature

Power Dissipation

DC Output Current

Soldering Temperature (under 10 sec)

SYMBOL

TERM

STG

OUT

SOLDER

RATING

-0.5 to 7.0

0 to 70(C grade)

-20 to 80(E grade)

-40 to 85(I grade)

-65 to 150

260

UNIT

℃

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

LY62W1024

Rev. 1.3

128K X 8 BIT LOW POWER CMOS SRAM

*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress

rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this

specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.

TRUTH TABLE

MODE

Standby

Output Disable

Read

Write

Note:

CE#

CE2

OE#

WE#

I/O OPERATION

High-Z

OUT

SUPPLY CURRENT

SB1

CC1

H = V

, L = V

, X = Don't care.

DC ELECTRICAL CHARACTERISTICS

SYMBOL

TEST CONDITION

MIN.

PARAMETER

Supply Voltage

2.7

Input High Voltage

0.7*Vcc

Input Low Voltage

- 0.2

≧

Input Leakage Current

-1

Output Leakage

≧

OUT

≧

SS,

-1

Current

Output Disabled

Output High Voltage

= -1mA

2.2

Output Low Voltage

= 2mA

- 35

Cycle time = Min.

CE# = V

and CE2 = V

, - 55

I/O

= 0mA

- 70

Average Operating

Cycle time = 1µs

Power supply Current

CE#

≦

0.2V and CE2

≧

-0.2V,

CC1

I/O

= 0mA

other pins at 0.2V or V

-0.2V

-SL

CE#

≧

-0.2V

or CE2

≦

0.2V

-SLE/-SLI

Standby Power

SB1

Other pins at 0.2V

Supply Current

-LL

or Vcc-0.2V

-LLE/-LLI

Notes:

1. V

(max) = V

+ 3.0V for pulse width less than 10ns.

2. V

(min) = V

- 3.0V for pulse width less than 10ns.

3. Over/Undershoot specifications are characterized, not 100% tested.

4. Typical values are included for reference only and are not guaranteed or tested.

Typical valued are measured at V

= V

(TYP.) and T

= 25℃

TYP.

3.0

2.7

MAX.

5.5

+0.3

0.6

0.4

UNIT

µA

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

LY62W1024

Rev. 1.3

128K X 8 BIT LOW POWER CMOS SRAM

CAPACITANCE

= 25

℃

, f = 1.0MHz)

PARAMETER

Input Capacitance

Input/Output Capacitance

SYMBOL

I/O

MIN.

MAX

UNIT

Note : These parameters are guaranteed by device characterization, but not production tested.

AC TEST CONDITIONS

Input Pulse Levels

Input Rise and Fall Times

Input and Output Timing Reference Levels

Output Load

0.2V to V

- 0.2V

3ns

1.5V

= 50pF + 1TTL, I

= -1mA/2mA

AC ELECTRICAL CHARACTERISTICS

(1) READ CYCLE

PARAMETER

Read Cycle Time

Address Access Time

Chip Enable Access Time

Output Enable Access Time

Chip Enable to Output in Low-Z

Output Enable to Output in Low-Z

Chip Disable to Output in High-Z

Output Disable to Output in High-Z

Output Hold from Address Change

(2) WRITE CYCLE

PARAMETER

Write Cycle Time

Address Valid to End of Write

Chip Enable to End of Write

Address Set-up Time

Write Pulse Width

Write Recovery Time

Data to Write Time Overlap

Data Hold from End of Write Time

Output Active from End of Write

Write to Output in High-Z

SYM. LY62W1024-35 LY62W1024-55 LY62W1024-70 UNIT

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

ACE

CLZ

OLZ

CHZ

OHZ

SYM. LY62W1024-35 LY62W1024-55 LY62W1024-70

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

WHZ

UNIT

*These parameters are guaranteed by device characterization, but not production tested.

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

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