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89H48H12G2ZCBL8

Description
pci interface IC pciE gen2 switch
Categorysemiconductor    Other integrated circuit (IC)   
File Size185KB,3 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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89H48H12G2ZCBL8 Overview

pci interface IC pciE gen2 switch

89H48H12G2ZCBL8 Parametric

Parameter NameAttribute value
ManufactureIDT (Integrated Device Technology)
Product CategoryPCI Interface IC
RoHSN
TypeSwitch - PCIe
Maximum Clock Frequency125 MHz
Number of Lanes48 Lane
Number of Ports12 P
Operating Supply Voltage1 V, 2.5 V, 3.3 V
Maximum Operating Temperature+ 70 C
Mounting StyleSMD/SMT
Package / CaseFCBGA-676
Maximum Data Rate384 Gbps
Minimum Operating Temperature0 C
PackagingReel
Factory Pack Quantity350
VersiGen2
48-Lane 12-Port PCIe® Gen2
System Interconnect Switch
®
89HPES48H12G2
Product Brief
The 89HPES48H12G2 is a member of the IDT PRECISE™ family of
PCI Express® switching solutions. The PES48H12G2 is a 48-lane, 12-
port system interconnect switch optimized for PCI Express Gen2 packet
switching in high-performance applications, supporting multiple simulta-
neous peer-to-peer traffic flows. Target applications include servers,
storage, communications, embedded systems, and multi-host or intelli-
gent I/O based systems with inter-domain communication.
Utilizing standard PCI Express Gen2 interconnect, the PES48H12G2
provides the most efficient system interconnect switching solution for
applications requiring high throughput, low latency, and simple board
layout with a minimum number of board layers. Each lane is capable of 5
GT/s of bandwidth in both directions and is fully compliant with PCI
Express Base specification 2.0.
Device Overview
Crosslink support
Automatic lane reversal
Autonomous and software managed link width and speed
control
Per lane SerDes configuration
• De-emphasis
• Receive equalization
• Drive strength
Switch Partitioning
IDT proprietary feature that creates logically independent
switches in the device
Supports up to 12 fully independent switch partitions
Configurable downstream port device numbering
Supports dynamic reconfiguration of switch partitions
• Dynamic port reconfiguration — downstream, upstream
• Dynamic migration of ports between partitions
• Movable upstream port within and between switch partitions
Initialization / Configuration
Supports Root (BIOS, OS, or driver), Serial EEPROM, or
SMBus switch initialization
Common switch configurations are supported with pin strap-
ping (no external components)
Supports in-system Serial EEPROM initialization/program-
ming
Quality of Service (QoS)
Port arbitration
• Round robin
• Weighted Round Robin (WRR)
Request metering
• IDT proprietary feature that balances bandwidth among
switch ports for maximum system throughput
High performance switch core architecture
• Combined Input Output Queued (CIOQ) switch architecture
with large buffers
Multicast
Compliant to the PCI-SIG multicast ECN
Supports arbitrary multicasting of Posted transactions
Supports 64 multicast groups
Multicast overlay mechanism support
ECRC regeneration support
Clocking
Supports 100 MHz and 125 MHz reference clock frequencies
Flexible clocking modes
• Common clock
• Non-common clock
Features
High Performance Non-Blocking Switch Architecture
48-lane 12-port PCIe switch
• Six x8 ports switch ports each of which can bifurcate to two
x4 ports (total of twelve x4 ports)
Integrated SerDes supports 5.0 GT/s Gen2 and 2.5 GT/s
Gen1 operation
Delivers up to
48 GBps (384 Gbps)
of switching capacity
Supports 128 Bytes to 2 KB maximum payload size
Low latency cut-through architecture
Supports one virtual channel and eight traffic classes
Standards and Compatibility
PCI Express Base Specification 2.0 compliant
Implements the following optional PCI Express features
• Advanced Error Reporting (AER) on all ports
• End-to-End CRC (ECRC)
• Access Control Services (ACS)
• Power Budgeting Enhanced Capability
• Device Serial Number Enhanced Capability
• Sub-System ID and Sub-System Vendor ID Capability
• Internal Error Reporting ECN
• Multicast ECN
• VGA and ISA enable
• L0s and L1 ASPM
• ARI ECN
Port Configurability
x4 and x8 ports
• Ability to merge adjacent x4 ports to create a x8 port
Automatic per port link width negotiation
(x8 --> x4 --> x2 --> x1)
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
1 of 3
©
2008 Integrated Device Technology, Inc.
September 25, 2008

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