WM2200ECS/R datasheet, PDF - EEWORLD Datasheet

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WM2200ECS/R: Descriptioninterface - codecs handset earpiece dvr; Categorysemiconductor Other integrated circuit (IC); File Size2MB，194 Pages; ManufacturerAll Sensors; Environmental Compliance

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WM2200ECS/R Overview

interface - codecs handset earpiece dvr

WM2200ECS/R Parametric

Parameter Name	Attribute value
Manufacture	Wolfson Microelectronics
Product Category	Interface - CODECs
RoHS	Yes
Type	Audio CODEC, Voice Band Low Powe
Resoluti	24 bi
Conversion Rate	16 kHz
Interface Type	Serial (2-Wire)
Number of ADCs	6
Number of DACs	2
Operating Supply Voltage	1.3 V, 1.8 V
Maximum Operating Temperature	+ 85 C
Mounting Style	SMD/SMT
Package / Case	WCSP-110
Packaging	Reel
Minimum Operating Temperature	- 40 C
SNR	93 dB ADC/100 dB DAC
Supply Voltage - Max	1.89 V, 3.6 V
Supply Voltage - Mi	950 mV, 1.71 V

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DESCRIPTION

The WM2200 is a low power mobile CODEC with enhanced

Wolfson Ambient Noise Cancellation (ANC). It is ideal for

mobile telephony applications, providing enhanced voice

communication quality for near-end and far-end handset

users.

The Wolfson ANC technology effectively reduces both

stationary and non-stationary background noise. Noise

reduction can be applied to receive (RX) audio paths.

The WM2200 is suitable for narrowband and wideband

voice call applications, with direct connection from analogue

or digital microphones. It can also be interfaced to baseband

processors with either analogue or digital voice TX/RX

signals.

The Wolfson ANC processor implements an enhanced

filtering algorithm to consistently deliver the optimum noise

cancellation performance. The function is supported using

two or more microphone input channels.

The RX Noise reduction improves received voice

intelligibility by reducing residual noise received from the far-

end user during a phone call.

The WM2200 supports analogue or digital microphone

inputs.

The WM2200 digital core provides extensive capability for

programmable signal processing algorithms. Equalisation

and application-specific filters can be implemented.

The integrated earpiece driver connects directly to the

receiver earpiece in a differential (BTL) configuration.

Speakerphone applications can be supported using the

integrated digital speaker (PDM) interface and an external

PDM-input speaker amplifier.

The device can be powered from a 1.8V external supply. An

integrated FLL provides support for a wide range of external

clock frequencies. The WM2200 is configured using a

standard 2-wire serial control interface. Fully differential

internal architecture and on-chip RF noise filters ensure a

very high degree of noise immunity.



WM2200

Low Power CODEC with

Enhanced Wolfson Ambient Noise Cancellation

FEATURES



Programmable DSP functions



Wolfson adaptive ambient noise cancellation

Receive-path noise reduction

Wind Noise management

Sidetone and other programmable filters

- Audio enhancements and voice processing functions

Audio inputs

Up to 6 analogue or digital microphone inputs

Single-ended or differential analogue microphone input



- Line input support (single-ended or differential)

Earpiece output driver

Differential (BTL) drive configuration

Integrated Charge Pump for ground referenced output

Dual outputs

Hearing Aid Coil support

Pop suppression functions

-75dB THD+N at 20mW into 32Ω load

- 96dB SNR (DAC to earpiece playback, A-weighted)

Digital speaker (PDM) interface for speakerphone support

Digital audio interface for RX/TX baseband processor

- 8kHz and 16kHz sample rates

Flexible system clocking

Dual clock input (MCLK1, MCLK2)

Frequency Locked Loop for wide range of input clock

reference frequencies, including down to 32kHz.

Configurable functions on 4 GPIO pins

Integrated power management

Two Charge Pumps and 2 LDO Regulators

- Support for 1.8V supply operation

110-ball W-CSP package (5.034 x 4.717 x 0.603 mm)



APPLICATIONS



Mobile Telephony

WOLFSON MICROELECTRONICS plc

Pre-Production, February 2014, Rev 3.1

2014

Wolfson Microelectronics plc

Pre-Production

WM2200

TABLE OF CONTENTS

DESCRIPTION ................................................................................................................ 1

FEATURES ..................................................................................................................... 1

APPLICATIONS ............................................................................................................. 1

BLOCK DIAGRAM ......................................................................................................... 2

TABLE OF CONTENTS.................................................................................................. 3

PIN CONFIGURATION ................................................................................................... 5

ORDERING INFORMATION ........................................................................................... 5

PIN DESCRIPTION ......................................................................................................... 6

ABSOLUTE MAXIMUM RATINGS ................................................................................. 9

RECOMMENDED OPERATING CONDITIONS .............................................................. 9

ELECTRICAL CHARACTERISTICS ............................................................................ 10

TERMINOLOGY ....................................................................................................................... 14

TYPICAL PERFORMANCE .......................................................................................... 15

SIGNAL TIMING REQUIREMENTS ............................................................................. 16

SYSTEM CLOCK & FREQUENCY LOCKED LOOP (FLL) ...................................................... 16

AUDIO INTERFACE TIMING ................................................................................................... 17

DIGITAL MICROPHONE (DMIC) INTERFACE TIMING ...............................................................................................................17

DIGITAL SPEAKER (PDM) INTERFACE TIMING ........................................................................................................................18

DIGITAL AUDIO INTERFACE - MASTER MODE .........................................................................................................................19

DIGITAL AUDIO INTERFACE - SLAVE MODE ............................................................................................................................20

DIGITAL AUDIO INTERFACE - TDM MODE ................................................................................................................................21

CONTROL INTERFACE TIMING ............................................................................................. 22

DEVICE DESCRIPTION ............................................................................................... 23

INTRODUCTION ...................................................................................................................... 23

INPUT SIGNAL PATH .............................................................................................................. 24

ANALOGUE MICROPHONE INPUT .............................................................................................................................................25

ANALOGUE LINE INPUT ..............................................................................................................................................................25

DIGITAL MICROPHONE INPUT ...................................................................................................................................................26

INPUT SIGNAL PATH ENABLE ....................................................................................................................................................27

INPUT SIGNAL PATH CONFIGURATION ....................................................................................................................................28

MICROPHONE BIAS CONTROL ..................................................................................................................................................31

INPUT SIGNAL PATH DIGITAL VOLUME CONTROL .................................................................................................................33

INPUT SIGNAL PATH ANC CONTROL ........................................................................................................................................37

DIGITAL MICROPHONE INTERFACE PULL-DOWN ...................................................................................................................37

DIGITAL CORE ........................................................................................................................ 38

DIGITAL CORE INPUTS ...............................................................................................................................................................40

DIGITAL CORE OUTPUT MIXERS ...............................................................................................................................................41

5-BAND PARAMETRIC EQUALISER (EQ) ...................................................................................................................................42

LOW PASS / HIGH PASS DIGITAL FILTER .................................................................................................................................45

DIGITAL CORE DSP .....................................................................................................................................................................46

TONE GENERATOR .....................................................................................................................................................................47

DSP FIRMWARE CONTROL ................................................................................................... 48

DSP FIRMWARE CLOCKING .......................................................................................................................................................48

DSP FIRMWARE REGISTER ACCESS ........................................................................................................................................49

DSP FIRMWARE ENABLE ............................................................................................................................................................53

AMBIENT NOISE CANCELLATION ......................................................................................... 54

DIGITAL AUDIO INTERFACE .................................................................................................. 55

MASTER AND SLAVE MODE OPERATION .................................................................................................................................55

AUDIO DATA FORMATS ..............................................................................................................................................................56

AIF TIMESLOT CONFIGURATION ...............................................................................................................................................57

TDM OPERATION BETWEEN THREE OR MORE DEVICES ......................................................................................................59

PP, February 2014, Rev 3.1

WM2200

Pre-Production

DIGITAL AUDIO INTERFACE CONTROL ............................................................................... 61

MASTER / SLAVE CONTROL .......................................................................................................................................................61

SIGNAL PATH ENABLE ................................................................................................................................................................63

BCLK AND LRCLK CONTROL ......................................................................................................................................................64

DIGITAL AUDIO DATA CONTROL ...............................................................................................................................................65

TDM AND TRI-STATE CONTROL ................................................................................................................................................66

DIGITAL AUDIO INTERFACE PULL-UP AND PULL-DOWN ........................................................................................................66

OUTPUT SIGNAL PATH .......................................................................................................... 67

OUTPUT SIGNAL PATH ENABLE ................................................................................................................................................68

OUTPUT SIGNAL PATH CONTROL .............................................................................................................................................71

OUTPUT SIGNAL PATH DIGITAL VOLUME ................................................................................................................................71

EARPIECE OUTPUTS AND VOLUME CONTROL .......................................................................................................................75

DIGITAL SPEAKER (PDM) OUTPUT CONTROL .........................................................................................................................76

GENERAL PURPOSE INPUT / OUTPUT ................................................................................ 78

GPIO CONTROL ...........................................................................................................................................................................78

GPIO FUNCTION SELECT ...........................................................................................................................................................80

DIGITAL AUDIO INTERFACE FUNCTION (ADCLRCLK1) ...........................................................................................................80

BUTTON DETECT (GPIO INPUT) ................................................................................................................................................80

LOGIC ‘1’ AND LOGIC ‘0’ OUTPUT (GPIO OUTPUT) ..................................................................................................................81

INTERRUPT (IRQ) STATUS OUTPUT .........................................................................................................................................81

CLOCK OUTPUT ...........................................................................................................................................................................81

FREQUENCY LOCKED LOOP (FLL) LOCK STATUS OUTPUT ..................................................................................................81

INTERRUPTS .......................................................................................................................... 82

CLOCKING AND SAMPLE RATES ......................................................................................... 85

BCLK AND LRCLK CONTROL ......................................................................................................................................................87

CONTROL INTERFACE CLOCKING ............................................................................................................................................87

FREQUENCY LOCKED LOOP (FLL) ............................................................................................................................................87

GPIO OUTPUTS FROM FLL .........................................................................................................................................................91

EXAMPLE FLL CALCULATION ....................................................................................................................................................92

EXAMPLE FLL SETTINGS ............................................................................................................................................................93

CONTROL INTERFACE .......................................................................................................... 94

CHARGE PUMPS AND LDO REGULATORS ......................................................................... 97

JTAG INTERFACE ................................................................................................................. 101

POWER ON RESET / HARDWARE RESET.......................................................................... 101

SOFTWARE RESET AND DEVICE ID .................................................................................. 103

REGISTER MAP ......................................................................................................... 104

REGISTER BITS BY ADDRESS ............................................................................................ 115

APPLICATIONS INFORMATION ............................................................................... 183

RECOMMENDED EXTERNAL COMPONENTS .................................................................... 183

ANALOGUE INPUT PATHS ........................................................................................................................................................183

DIGITAL MICROPHONE INPUT PATHS ....................................................................................................................................183

MICROPHONE BIAS CIRCUIT ...................................................................................................................................................184

EARPIECE DRIVER OUTPUT PATH ..........................................................................................................................................185

POWER SUPPLY / REFERENCE DECOUPLING ......................................................................................................................185

CHARGE PUMP COMPONENTS ...............................................................................................................................................186

RECOMMENDED EXTERNAL COMPONENTS DIAGRAM .......................................................................................................187

DIGITAL AUDIO INTERFACE CLOCKING CONFIGURATIONS .......................................... 188

PCB LAYOUT CONSIDERATIONS ....................................................................................... 190

PACKAGE DIMENSIONS ........................................................................................... 191

IMPORTANT NOTICE ................................................................................................ 192

ADDRESS: ............................................................................................................................. 192

REVISION HISTORY .................................................................................................. 193

PP, February 2014, Rev 3.1

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