System-on-Chip (SoC) containing an ARM 922T 32-bit
processor and a rich set of peripherals to address the cost-
sensitive, high-performance needs of a wide variety of high
bandwidth networking and communications applications.
The KSZ9692PB-S is a small package version of
KSZ9692PB and it supports 16 bit DDR data width.
•
Glueless Support for mini-PCI or CardBus devices
Dual High Speed USB 2.0 Interfaces
•
Two USB2.0 ports with integrated PHY
•
Can be configured as 2-port host, or host + device
SDIO/SD Host Controller
•
Meets SD Host Controller Standard Specification
Version 1.0
•
Meets SDIO card specification Version 1.0
DMA Controllers
•
Dedicated DMA channels for PCI, USB, IPSec, SDIO
and Ethernet ports.
Peripherals
•
Four high-speed UART ports up to 5 Mbps
•
Two programmable 32-bit timers with watchdog timer
capability
•
Interrupt Controller
•
Twenty GPIO ports
•
One shared SPI/I2C interface
•
One I2S port
Debugging
•
ARM9 JTAG debug interface
•
JTAG Boundary Scan Support
Power Management
•
CPU and system clock speed step-down options
•
Ethernet port Wake-on-LAN
•
DDR and PCI power down
Operating Voltage
•
1.3V power for core
•
3.3V power for I/O
•
2.5V or 2.6V power for DDR memory interface
Reference Hardware and Software Evaluation Kit
•
Hardware evaluation Kit
•
Software Evaluation Kit includes WinCE BSP, Open
WRT BSP, Linux based SOHO Router packages
Features
ARM 922T High-Performance Processor Core
•
250 MHz ARM 922T RISC processor core
•
8KB I-cache and 8KB D-cache
•
Configurable Memory Management Unit (MMU) for
Linux and WinCE
Memory Controller
•
8/16-bit external bus interface for FLASH, ROM, SRAM,
and external I/O
•
NAND FLASH controller
•
200MHz 32-bit DDR controller
•
Two JEDEC Specification JESD82-1 compliant
differential clock drivers for a glueless DDR interface
solution
Ethernet Interfaces
•
Two Ethernet (10/100 Mbps) MACs
•
MII interface
•
Fully compliant with IEEE 802.3 Ethernet standards
IP Security Engine
•
•
•
•
•
•
•
•
•
•
Hardware IPSec Engine guarantees 100Mbps VPN
Secure Socket Layer Support
DES/3DES/AES/RC4 Cyphers
MD-5, SHA-1, SHA-256 Hashing Algorithms
HMAC
SSLMAC
Version PCI 2.3
32-bit 33/66MHz
Integrated PCI Arbiter supports three external masters
Configurable as Host bridge or Guest device
PCI Interface
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
May 2011
M9999-051111-4.0
Micrel, Inc.
KSZ8692PB, KSZ8692PB-S
Applications
•
•
•
•
•
•
•
•
•
Enhanced residential gateways
High-end printer servers
Voice-over-Internet Protocol (VoIP) systems
IP-based multimedia systems
Wireless Access Points or Mesh Nodes
USB device servers
Industrial control
Video surveillance systems
SMB/SME Network Security Applications, including
VPN Routers
Ordering Information
Part Number
KSZ8692PB,
KSZ8692PBI
KSZ8692PB-S
Temp.
Range
0°C to 70°C
-40°C to 85°C
0°C to 70°C
Package
400-Pin PBGA
400-Pin PBGA
400-Pin PBGA
Lead
Finish
Pb-Free
Pb-Free
Pb-Free
May, 2011
2
M9999-051111-4.0
Micrel, Inc.
KSZ8692PB, KSZ8692PB-S
Revision History
Revision
1.0
2.0
3.0
4.0
4.1
5.0
Date
9/23/08
3/10/09
8/10/09
01/28/10
06/10/10
04/14/11
09/13/11
Summary of Changes
Preliminary Release
Power Sequencing, Added A1 (PMEN) to pin list, 1.3V Supply for Core, Power Consumption table
DDR Data Width Changed to 16-bit
DDR Data Width Changed to 32-bit
Remove NAND Boot support
Add small packet device KSZ9692PB-S
Change the port 0 to port 2 at Figure 12 and 13. Change RSVD to DATA[31..16] in Figure 20.
May, 2011
3
M9999-051111-4.0
Micrel, Inc.
KSZ8692PB, KSZ8692PB-S
Block Diagram
Figure 1. KSZ8692PB, KSZ8692PB-S Block Diagram
May, 2011
4
M9999-051111-4.0
Micrel, Inc.
KSZ8692PB, KSZ8692PB-S
Contents
System Level Applications ...................................................................................................................................................... 8
ARM High-Performance Processor................................................................................................................................... 26
FLASH/ROM/SRAM Memory and External I/O Interface.................................................................................................. 26
IP Security Engine............................................................................................................................................................. 33
USB 2.0 Interface .............................................................................................................................................................. 34
Link Change ................................................................................................................................................................ 36
Timers and Watchdog..................................................................................................................................................... 37
System Level Interfaces ................................................................................................................................................. 39
Absolute Maximum Ratings .................................................................................................................................................. 25
Signal Location Information................................................................................................................................................... 44
Package Information ............................................................................................................................................................. 45
京公网安备 11010802033920号
EEWORLD
