74LVC3G34DC,125 datasheet, PDF

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74LVC3G34DC,125: Descriptionbuffers & line drivers 3.3V triple buf gate; Categorylogic logic; File Size283KB，22 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74LVC3G34DC,125 Overview

buffers & line drivers 3.3V triple buf gate

74LVC3G34DC,125 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconductor
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SSOP
package instruction	2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8
Contacts	8
Manufacturer packaging code	SOT765-1
Reach Compliance Code	compliant
Is Samacsys	N
series	LVC/LCX/Z
JESD-30 code	R-PDSO-G8
JESD-609 code	e4
length	2.3 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUFFER
MaximumI(ol)	0.024 A
Humidity sensitivity level	1
Number of functions	3
Number of entries	1
Number of terminals	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	VSSOP
Encapsulate equivalent code	TSSOP8,.12,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Sup	5.1 ns
propagation delay (tpd)	10.8 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	2 mm
Base Number Matches	1

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74LVC3G34

Triple buffer

Rev. 11 — 2 April 2013

Product data sheet

1. General description

The 74LVC3G34 provides three buffers.

The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of

the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing a damaging backflow current through the device

when it is powered down.

2. Features and benefits



Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant input/output for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:



JESD8-7 (1.65 V to 1.95 V)



JESD8-5 (2.3 V to 2.7 V)



JESD8B/JESD36 (2.7 V to 3.6 V)

ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V

24

mA output drive (V

= 3.0 V)

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Multiple package options

Specified from

40 C

to +85

C

and

40 C

to +125

C



74LVC3G34DC,125 Related Products

	74LVC3G34DC,125	74LVC3G34GD,125	74LVC3G34GM,125
Description	buffers & line drivers 3.3V triple buf gate	buffers & line drivers buffer 3-CH 8-pin non-inverting cmos	buffers & line drivers 3.3V triple buf gate
Brand Name	NXP Semiconductor	NXP Semiconductor	NXP Semiconductor
Is it Rohs certified?	conform to	conform to	conform to
Maker	NXP	NXP	NXP
Parts packaging code	SSOP	SON	QFN
package instruction	2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8	VSON, SOLCC8,.11,20	1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1, XQFN-8
Contacts	8	8	8
Manufacturer packaging code	SOT765-1	SOT996-2	SOT902-2
Reach Compliance Code	compliant	compliant	compliant
series	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	R-PDSO-G8	R-PDSO-N8	S-PBCC-B8
JESD-609 code	e4	e4	e4
length	2.3 mm	3 mm	1.6 mm
Load capacitance (CL)	50 pF	50 pF	50 pF
Logic integrated circuit type	BUFFER	BUFFER	BUFFER
MaximumI(ol)	0.024 A	0.024 A	0.024 A
Humidity sensitivity level	1	1	1
Number of functions	3	3	3
Number of entries	1	1	1
Number of terminals	8	8	8
Maximum operating temperature	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VSSOP	VSON	VBCC
Encapsulate equivalent code	TSSOP8,.12,20	SOLCC8,.11,20	LCC8,.06SQ,20
Package shape	RECTANGULAR	RECTANGULAR	SQUARE
Package form	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, VERY THIN PROFILE	CHIP CARRIER, VERY THIN PROFILE
method of packing	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260	260	260
power supply	3.3 V	3.3 V	3.3 V
Prop。Delay @ Nom-Sup	5.1 ns	5.1 ns	5.1 ns
propagation delay (tpd)	10.8 ns	10.8 ns	10.8 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Schmitt trigger	NO	NO	NO
Maximum seat height	1 mm	0.5 mm	0.5 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	1.65 V	1.65 V	1.65 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD
Terminal form	GULL WING	NO LEAD	BUTT
Terminal pitch	0.5 mm	0.5 mm	0.5 mm
Terminal location	DUAL	DUAL	BOTTOM
Maximum time at peak reflow temperature	30	30	30
width	2 mm	2 mm	1.6 mm
Base Number Matches	1	1	-

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