7132LA90L52 datasheet, PDF - EEWORLD Datasheet

7132LA90L52: DescriptionMulti-Port SRAM, 2KX8, 90ns, CMOS, CQCC52; Categorystorage storage; File Size1MB，14 Pages; ManufacturerIDT (Integrated Device Technology)

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7132LA90L52 Overview

Multi-Port SRAM, 2KX8, 90ns, CMOS, CQCC52

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Objectid	1167347039
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	90 ns
I/O type	COMMON
JESD-30 code	S-XQCC-N52
JESD-609 code	e0
memory density	16384 bit
Memory IC Type	MULTI-PORT SRAM
memory width	8
Number of ports	2
Number of terminals	52
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2KX8
Output characteristics	3-STATE
Package body material	CERAMIC
encapsulated code	QCCN
Encapsulate equivalent code	LCC52,.75SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.0015 A
Minimum standby current	2 V
Maximum slew rate	0.13 mA
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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