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8N4D085BC-203LCD

Description
LVDS Output Clock Oscillator
CategoryPassive components    oscillator   
File Size602KB,18 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
Download Datasheet Parametric View All

8N4D085BC-203LCD Overview

LVDS Output Clock Oscillator

8N4D085BC-203LCD Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Objectid1320166281
Reach Compliance Codecompliant
Other featuresENABLE/DISABLE FUNCTION; DIFFERENTIAL OUTPUT; O/P FREQ 155.52MHZ ALSO AVAILABLE; TRAY
maximum descent time0.45 ns
Frequency Adjustment - MechanicalNO
frequency stability100%
JESD-609 codee3
Installation featuresSURFACE MOUNT
Nominal operating frequency622.08 MHz
Maximum operating temperature70 °C
Minimum operating temperature
Oscillator typeLVDS
physical size7.0mm x 5.0mm x 1.55mm
longest rise time0.45 ns
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry53/47 %
Terminal surfaceMatte Tin (Sn)
LVDS Dual Frequency Programmable
Crystal Oscillator
IDT8N4D085
DATASHEET
General Description
The IDT8N4D085 is an LVDS Dual Frequency-Programmable Crys-
tal Oscillator with very flexible frequency programming capabilities.
The device uses IDT’s fourth generation FemtoClock
®
NG technolo-
gy for an optimum of high clock frequency and low phase noise per-
formance. The device accepts 2.5V or 3.3V supply and is packaged
in a small, lead-free (RoHS 6) 6-lead ceramic 5mm x 7mm x 1.55mm
package.
The device can be programmed to any in the range from 15.476MHz
to 866.67MHz and from 975MHz to 1,300MHz and supports a very
high degree of frequency precision of 218Hz or better. One of two
pre-set output frequencies is selected by the FSEL pin.The extended
temperature range supports wireless infrastructure, telecommunica-
tion and networking end equipment requirements.
Features
Fourth generation FemtoClock
®
NG technology
Factory-programmable clock output frequency from 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz
Frequency programming resolution is 218Hz and better
One 2.5V, 3.3V LVDS clock output
Output enable control (negative polarity), LVCMOS/LVTTL
compatible
LVCMOS compatible control inputs
RMS phase jitter @ 156.25MHz (12kHz - 20MHz):
0.24ps (typical), integer PLL feedback configuration
RMS phase jitter @ 156.25MHz (1kHz - 40MHz):
0.27ps (typical), integer PLL feedback configuration
2.5V or 3.3V supply
-40°C to 85°C ambient operating temperature
Available in a lead-free (RoHS 6) 6-pin ceramic package
Block Diagram
PFD
&
LPF
FemtoClock
®
NG
VCO
1950-2600MHz
Pin Assignment
OE 1
6 V
DD
5 nQ
4 Q
OSC
f
REF
2
÷P
÷N
Q
nQ
FSEL 2
GND 3
÷MINT,
MFRAC
25
FSEL
OE
Pulldown
Pullup
7
IDT8N4D085
6-lead ceramic 5mm x 7mm x 1.55mm
package body
CD Package
Top View
Configuration Register (ROM)
IDT8N4D085CCD
NOVEMBER 29, 2012
1
©2012 Integrated Device Technology, Inc.
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