EE PLD, 20ns, PAL-Type, CMOS, CPGA48
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Objectid | 100126509 |
| package instruction | PGA, PGA48,5X10 |
| Reach Compliance Code | unknown |
| ECCN code | 3A001.A.2.C |
| Architecture | PAL-TYPE |
| JESD-30 code | R-XPGA-P48 |
| JESD-609 code | e0 |
| Number of entries | 44 |
| Output times | 20 |
| Number of product terms | 264 |
| Number of terminals | 48 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| Output function | MACROCELL |
| Package body material | CERAMIC |
| encapsulated code | PGA |
| Encapsulate equivalent code | PGA48,5X10 |
| Package shape | RECTANGULAR |
| Package form | GRID ARRAY |
| power supply | 5 V |
| Programmable logic type | EE PLD |
| propagation delay | 20 ns |
| Certification status | Not Qualified |
| Filter level | 38535Q/M;38534H;883B |
| Nominal supply voltage | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | PIN/PEG |
| Terminal pitch | 2.54 mm |
| Terminal location | PERPENDICULAR |
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