Low Skew, 1-to-2, Differential-to-LVHSTL
Fanout Buffer
PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES SEPTEMBER 7, 2016
85211BI-03
DATA SHEET
General Description
The 85211BI-03 is a low skew, high performance 1-to-2
Differential-to-LVHSTL Fanout Buffer. The CLK, nCLK pair can
accept most standard differential input levels.The 85211BI-03 is
characterized to operate from a 3.3V power supply. Guaranteed
output and part-to-part skew characteristics make the 85211BI-03
ideal for those clock distribution applications demanding well defined
performance and repeatability.
Features
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Two differential LVHSTL compatible outputs
One differential CLK, nCLK input pair
CLK, nCLK pair can accept the following differential input levels:
LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 700MHz
Translates any single ended input signal to LVHSTL levels with
resistor bias on nCLK input
Output skew: 30ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 1.3ns (maximum)
Output duty cycle: 49% – 51% up to 266.6MHz
V
OH
= 1.15V (maximum)
3.3V operating supply
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
For functional replacement use 8523
Block Diagram
CLK
Pullup
nCLK
Pulldown
Q0
nQ0
Q1
nQ1
Pin Assignment
Q0
nQ0
Q1
nQ1
1
2
3
4
8
7
6
5
V
DD
CLK
nCLK
GND
85211BI-03
8-Lead SOIC
3.90mm x 4.903mm x 1.37mm package body
M Package
Top View
85211BI-03 Rev D March 11, 2016
1
©2016 Integrated Device Technology, Inc.
85211BI-03 DATA SHEET
Table 1. Pin Descriptions
Number
1, 2
3, 4
5
6
7
8
Name
Q0, nQ0
Q1, nQ1
GND
nCLK
CLK
V
DD
Output
Output
Power
Input
Input
Power
Pulldown
Pullup
Type
Description
Differential output pair. LVHSTL interface levels.
Differential output pair. LVHSTL interface levels.
Power supply ground.
Inverting differential clock input.
Non-inverting differential clock input.
Positive supply pin.
NOTE:
Pullup and Pulldown
refer to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLUP
Parameter
Input Capacitance
Input Pullup Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
k
k
R
PULLDOWN
Input Pulldown Resistor
Function Tables
Table 3. Clock Input Function Table
Inputs
CLK
0
1
0
1
Biased; NOTE 1
Biased; NOTE 1
nCLK
0
1
Biased; NOTE 1
Biased; NOTE 1
0
1
Q0, Q1
LOW
HIGH
LOW
HIGH
HIGH
LOW
Outputs
nQ0, nQ1
HIGH
LOW
HIGH
LOW
LOW
HIGH
Input to Output Mode
Differential to Differential
Differential to Differential
Single-Ended to Differential
Single-Ended to Differential
Single-Ended to Differential
Single-Ended to Differential
Polarity
Non-Inverting
Non-Inverting
Non-Inverting
Non-Inverting
Inverting
Inverting
NOTE 1: Please refer to the Application Information section, ""Wiring the Differential Input to Accept Single Ended Levels"".
LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
2
Rev D March 11, 2016
85211BI-03 DATA SHEET
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
DD
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Storage Temperature, T
STG
Package Thermal Impedance,
JA
Rating
4.6V
-0.5V to V
DD
+ 0.5V
50mA
100mA
-65C to 150C
112.7C/W (0 lfpm)
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
DD
= 3.3V±5%, T
A
= -40°C to 85°C
Symbol
V
DD
I
DD
Parameter
Positive Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
Typical
3.3
Maximum
3.465
55
Units
V
mA
Table 4B. Differential DC Characteristics,
V
DD
= 3.3V±5%, T
A
= -40°C to 85°C
Symbol
I
IH
Parameter
CLK
Input High Current
nCLK
CLK
I
IL
V
PP
V
CMR
Input Low Current
nCLK
Peak-to-Peak Input Voltage;
NOTE 1
Common Mode Input Voltage;
NOTE 1, 2
Test Conditions
V
DD
= V
IN
= 3.465V
V
DD
= V
IN
= 3.465V
V
DD
= 3.465V, V
IN
= 0V
V
DD
= 3.465V, V
IN
= 0V
-150
-5
0.15
GND + 0.5
1.3
V
DD
– 0.85
Minimum
Typical
Maximum
5
150
Units
µA
µA
µA
µA
V
V
NOTE 1: V
IL
should not be less than -0.3V.
NOTE 2: Common mode voltage is defined as V
IH
.
LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
3
Rev D March 11, 2016
85211BI-03 DATA SHEET
Table 4C. LVHSTL DC Characteristics,
V
DD
= 3.3V±5%, T
A
= -40°C to 85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Current; NOTE 1
Output Low Current; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
0.7
0
0.3
0.65
Typical
Maximum
1.15
0.4
1.15
Units
V
V
V
NOTE 1: Outputs terminated with 50 to ground.
AC Electrical Characteristics
Table 5. AC Characteristics,
V
DD
= 3.3V±5%, T
A
= -40°C to 85°C
Symbol
f
MAX
t
PD
tsk(o)
tsk(pp)
t
R
/ t
F
odc
Parameter
Output Frequency
Propagation Delay; NOTE 1
Output Skew; NOTE 2, 4
Part-to-Part Skew; NOTE 3, 4
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
ƒ
266.6MHz
185
47
49
ƒ
600MHz
0.9
Test Conditions
Minimum
Typical
Maximum
700
1.3
30
250
450
53
51
Units
MHz
ns
ps
ps
ps
%
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. Device will meet specifications after thermal equilibrium has
been reached under these conditions.
The cycle-to-cycle jitter on the input will equal the jitter on the output. The part does not add jitter.
All parameters are measured 600MHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential cross
points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Rev D March 11, 2016
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LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
85211BI-03 DATA SHEET
Parameter Measurement Information
3.3V ± 5%
VDD
V
DD
Qx
SCOPE
nCLK
V
PP
Cross Points
V
CMR
LVHSTL
nQx
CLK
GND
GND
0V
Output Load AC Test Circuit
Differential Input Level
Par t 1
nQx
nQx
Qx
Qx
nQy
nQy
Qy
Par t 2
Qy
tsk(pp)
Part-to-Part Skew
Output Skew
nCLK
nQ[0:1]
CLK
nQ[0:1]
Q[0:1]
Q[0:1]
t
PD
Output Rise/Fall Time
Propagation Delay
LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
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Rev D March 11, 2016
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