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70V3389S5PRFI

Description
Sram 64kx18 std-pwr 3.3V sync dual-port ram
Categorysemiconductor    Other integrated circuit (IC)   
File Size163KB,17 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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70V3389S5PRFI Overview

Sram 64kx18 std-pwr 3.3V sync dual-port ram

70V3389S5PRFI Parametric

Parameter NameAttribute value
ManufactureIDT (Integrated Device Technology)
Product CategorySRAM
RoHSN
Package / CaseTQFP-128
PackagingBulk
Factory Pack Quantity6
HIGH-SPEED 3.3V 64K x 18
SYNCHRONOUS PIPELINED
DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
Features
IDT70V3389S
True Dual-Port memory cells which allow simultaneous
access of the same memory location
High-speed clock to data access
– Commercial: 4.2/5/6ns (max.)
– Industrial: 5ns (max)
Pipelined output mode
Counter enable and reset features
Dual chip enables allow for depth expansion without
additional logic
Full synchronous operation on both ports
– 7.5ns cycle time, 133MHz operation (9.6 Gbps bandwidth)
– Fast 4.2ns clock to data out
– 1.8ns setup to clock and 0.7ns hold on all control, data, and
address inputs @ 133MHz
– Data input, address, byte enable and control registers
– Self-timed write allows fast cycle time
Separate byte controls for multiplexed bus and bus
matching compatibility
LVTTL- compatible, single 3.3V (±150mV) power supply for
core
LVTTL- compatible, selectable 3.3V (±150mV)/2.5V (±125mV)
power supply for I/Os and control signals on each port
Industrial temperature range (-40°C to +85°C) is
available for selected speeds
Available in a 128-pin Thin Quad Plastic Flatpack (TQFP),
208-pin fine pitch Ball Grid Array, and 256-pin Ball
Grid Array
Green parts available, see ordering information
Functional Block Diagram
UB
L
UB
R
LB
R
R/W
R
B
W
0
L
B
W
1
L
B B
WW
1 0
R R
LB
L
R/W
L
CE
0L
CE
1L
CE
0R
CE
1R
OE
L
Dout0-8_L
Dout9-17_L
Dout0-8_R
Dout9-17_R
OE
R
64K x 18
MEMORY
ARRAY
I/O
0 L
- I/O
1 7 L
CLK
L
Din_L
Din_R
I/O
0R
- I/O
17R
CLK
R
A
15L
A
0L
CNTRST
L
ADS
L
CNTEN
L
Counter/
Address
Reg.
A
15R
ADDR_L
ADDR_R
Counter/
Address
Reg.
A
0R
CNTRST
R
ADS
R
CNTEN
R
4832 tbl 01
.
JANUARY 2009
1
©2009 Integrated Device Technology, Inc.
DSC 4832/12
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