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Si5366-C-GQ

Description
clock generators & support products pin-program clk mult /jitter atten 5 out
CategoryWireless rf/communication    Telecom circuit   
File Size657KB,22 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance
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Si5366-C-GQ Overview

clock generators & support products pin-program clk mult /jitter atten 5 out

Si5366-C-GQ Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Parts packaging codeQFP
package instruction14 X 14 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100
Contacts100
Reach Compliance Codecompli
appSONET;SDH
JESD-30 codeS-PQFP-G100
length14 mm
Number of functions1
Number of terminals100
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeHTFQFP
Package shapeSQUARE
Package formFLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.2 mm
Nominal supply voltage1.8 V
surface mountYES
Telecom integrated circuit typesATM/SONET/SDH SUPPORT CIRCUIT
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width14 mm
S i535 5
A
N Y
-F
R E Q U E N C Y
1–20 0 MH
Z
Q
U A D
F
R E Q U E N C Y
8-O
U T P U T
C
L O C K
G
E N E R A T O R
Features
Generates any frequency from 1 to
200 MHz on each of the 4 output banks
Eight CMOS clock outputs
Guaranteed 0 ppm frequency synthesis
error for any combination of frequencies
25 or 27 MHz xtal or 5–200 MHz input clk
Five programmable control pins (output
enable, frequency select, reset)
Separate OEB pins to disable individual
banks or all outputs
Loss of signal output
Low 50 ps (typ) pk-pk period jitter
Phase jitter: 2 ps rms 12 kHz–20 MHz
Excellent PSRR performance
eliminates need for external power
supply filtering
Low power: 45 mA (core)
Core VDD: 1.8, 2.5, or 3.3 V
Separate VDDO for each bank of
outputs: 1.8, 2.5, or 3.3 V
Small size: 4x4 mm 24-QFN
Industrial temperature range:
–40 to +85 °C
Custom versions available using
ClockBuilder™ web utility
Samples available in 2 weeks
Ordering Information:
See page 17.
Pin Assignments
Applications
Printers
Audio/video
Networking
Communications
Storage
Switches/routers
Computing
Servers
OC-3/OC-12 line cards
Description
The Si5355 is a highly flexible clock generator capable of synthesizing four
completely non-integer related frequencies up to 200 MHz. The device has four
banks of outputs with each bank supporting two CMOS outputs at the same
frequency. Using Silicon Laboratories' patented MultiSynth fractional divider
technology, all outputs are guaranteed to have 0 ppm frequency synthesis error
regardless of configuration, enabling the replacement of multiple clock ICs and
crystal oscillators with a single device. Through a flexible web configuration utility
called ClockBuilder™ (www.silabs.com/ClockBuilder), factory-customized pin-
controlled Si5355 devices are available in two weeks without minimum order
quantity restrictions. The Si5355 supports up to three independent, pin-selectable
device configurations, enabling one device to replace three separate clock ICs.
Functional Block Diagram
Rev. 1.2 4/17
Copyright © 2017 by Silicon Laboratories
Si5355
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