74AUP2G86GD,125 datasheet, PDF

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74AUP2G86GD,125: Descriptionlogic gates low-pwr dual 2-input exclusive-OR gate; Categorylogic logic; File Size278KB，21 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74AUP2G86GD,125 Overview

logic gates low-pwr dual 2-input exclusive-OR gate

74AUP2G86GD,125 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconduc
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SON
package instruction	VSON, SOLCC8,.12,20
Contacts	8
Manufacturer packaging code	SOT996-2
Reach Compliance Code	compli
series	AUP/ULP/V
JESD-30 code	R-PDSO-N8
JESD-609 code	e3
length	3 mm
Load capacitance (CL)	30 pF
Logic integrated circuit type	XOR GATE
MaximumI(ol)	0.0017 A
Humidity sensitivity level	1
Number of functions	2
Number of entries	2
Number of terminals	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	VSON
Encapsulate equivalent code	SOLCC8,.12,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.2/3.3 V
Prop。Delay @ Nom-Su	26.6 ns
propagation delay (tpd)	26.6 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	0.5 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.1 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Matte Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	2 mm

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74AUP2G86

Low-power dual 2-input EXCLUSIVE-OR gate

Rev. 8 — 24 January 2013

Product data sheet

1. General description

The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall

times across the entire V

range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire

range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing a damaging backflow current through the device

when it is powered down.

2. Features and benefits



Wide supply voltage range from 0.8 V to 3.6 V



High noise immunity



Complies with JEDEC standards:



JESD8-12 (0.8 V to 1.3 V)



JESD8-11 (0.9 V to 1.65 V)



JESD8-7 (1.2 V to 1.95 V)



JESD8-5 (1.8 V to 2.7 V)



JESD8-B (2.7 V to 3.6 V)



ESD protection:



HBM JESD22-A114F Class 3A exceeds 5000 V



MM JESD22-A115-A exceeds 200 V



CDM JESD22-C101E exceeds 1000 V



Low static power consumption; I

= 0.9

A

(maximum)



Latch-up performance exceeds 100 mA per JESD78 Class II



Inputs accept voltages up to 3.6 V



Low noise overshoot and undershoot < 10 % of V



OFF

circuitry provides partial Power-down mode operation



Multiple package options



Specified from

40 C

to +85

C

and

40 C

to +125

C

74AUP2G86GD,125 Related Products

	74AUP2G86GD,125	74AUP2G86GT,115	74AUP2G86GN,115	74AUP2G86GM,125	74AUP2G86DC,125	74AUP2G86GS,115
Description	logic gates low-pwr dual 2-input exclusive-OR gate	logic gates 1.8V dual low-pwr	logic gates low-power dual 2-input OR gate	logic gates 1.8V dual low-pwr	logic gates 1.8V dual LO-pow	logic gates OR 4.6 V 20 mA
Brand Name	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to
Maker	NXP	NXP	NXP	NXP	NXP	NXP
Parts packaging code	SON	SON	SON	QFN	SSOP	SON
package instruction	VSON, SOLCC8,.12,20	VSON, SOLCC8,.04,20	1.20 X 1 MM, 0.35 MM HEIGHT, SOT-1116, SON-8	VQCCN, LCC8,.06SQ,20	VSSOP, TSSOP8,.12,20	1.35 X 1 MM, 0.35 MM HEIGHT, 0.35 MM PITCH, SOT-1203, SON-8
Contacts	8	8	8	8	8	8
Manufacturer packaging code	SOT996-2	SOT833-1	SOT1116	SOT902-2	SOT765-1	SOT1203
Reach Compliance Code	compli	compli	compli	compli	compli	compli
series	AUP/ULP/V	AUP/ULP/V	-	AUP/ULP/V	AUP/ULP/V	-
JESD-30 code	R-PDSO-N8	R-PDSO-N8	-	S-PQCC-N8	R-PDSO-G8	-
JESD-609 code	e3	e3	-	e4	e4	-
length	3 mm	1.95 mm	-	1.6 mm	2.3 mm	-
Load capacitance (CL)	30 pF	30 pF	-	30 pF	30 pF	-
Logic integrated circuit type	XOR GATE	XOR GATE	-	XOR GATE	XOR GATE	-
MaximumI(ol)	0.0017 A	0.0017 A	-	0.0017 A	0.0017 A	-
Humidity sensitivity level	1	1	-	1	1	-
Number of functions	2	2	-	2	2	-
Number of entries	2	2	-	2	2	-
Number of terminals	8	8	-	8	8	-
Maximum operating temperature	125 °C	125 °C	-	125 °C	125 °C	-
Minimum operating temperature	-40 °C	-40 °C	-	-40 °C	-40 °C	-
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	-
encapsulated code	VSON	VSON	-	VQCCN	VSSOP	-
Encapsulate equivalent code	SOLCC8,.12,20	SOLCC8,.04,20	-	LCC8,.06SQ,20	TSSOP8,.12,20	-
Package shape	RECTANGULAR	RECTANGULAR	-	SQUARE	RECTANGULAR	-
Package form	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE	-	CHIP CARRIER, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH	-
method of packing	TAPE AND REEL	TAPE AND REEL	-	TAPE AND REEL	TAPE AND REEL	-
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	260	-	260	260	-
power supply	1.2/3.3 V	1.2/3.3 V	-	1.2/3.3 V	1.2/3.3 V	-
Prop。Delay @ Nom-Su	26.6 ns	26.6 ns	-	26.6 ns	26.6 ns	-
propagation delay (tpd)	26.6 ns	26.6 ns	-	26.6 ns	26.6 ns	-
Certification status	Not Qualified	Not Qualified	-	Not Qualified	Not Qualified	-
Schmitt trigger	NO	NO	-	NO	NO	-
Maximum seat height	0.5 mm	0.5 mm	-	0.5 mm	1 mm	-
Maximum supply voltage (Vsup)	3.6 V	3.6 V	-	3.6 V	3.6 V	-
Minimum supply voltage (Vsup)	0.8 V	0.8 V	-	0.8 V	0.8 V	-
Nominal supply voltage (Vsup)	1.1 V	1.2 V	-	1.1 V	1.2 V	-
surface mount	YES	YES	-	YES	YES	-
technology	CMOS	CMOS	-	CMOS	CMOS	-
Temperature level	AUTOMOTIVE	AUTOMOTIVE	-	AUTOMOTIVE	AUTOMOTIVE	-
Terminal surface	Matte Tin (Sn)	Tin (Sn)	-	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	-
Terminal form	NO LEAD	NO LEAD	-	NO LEAD	GULL WING	-
Terminal pitch	0.5 mm	0.5 mm	-	0.5 mm	0.5 mm	-
Terminal location	DUAL	DUAL	-	QUAD	DUAL	-
Maximum time at peak reflow temperature	NOT SPECIFIED	30	-	30	30	-
width	2 mm	1 mm	-	1.6 mm	2 mm	-

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