74LVC2G38DC,125 datasheet, PDF

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74LVC2G38DC,125: Descriptionlogic gates 3.3V dual 2-input; Categorylogic logic; File Size279KB，21 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74LVC2G38DC,125 Overview

logic gates 3.3V dual 2-input

74LVC2G38DC,125 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconduc
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SSOP
package instruction	VSSOP, TSSOP8,.12,20
Contacts	8
Manufacturer packaging code	SOT765-1
Reach Compliance Code	compli
series	LVC/LCX/Z
JESD-30 code	R-PDSO-G8
JESD-609 code	e4
length	2.3 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.024 A
Humidity sensitivity level	1
Number of functions	2
Number of entries	2
Number of terminals	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	OPEN-DRAIN
Package body material	PLASTIC/EPOXY
encapsulated code	VSSOP
Encapsulate equivalent code	TSSOP8,.12,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Su	5.2 ns
propagation delay (tpd)	10.8 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	NICKEL PALLADIUM GOLD
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	2 mm
Base Number Matches	1

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74LVC2G38

Dual 2-input NAND gate; open drain

Rev. 11 — 8 April 2013

Product data sheet

1. General description

The 74LVC2G38 provides a 2-input NAND function.

The outputs of the 74LVC2G38 devices are open-drain and can be connected to other

open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND

functions.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

devices as translators in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing the damaging backflow current through the device

when it is powered down.

2. Features and benefits



Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant outputs for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:



JESD8-7 (1.65 V to 1.95 V)



JESD8-5 (2.3 V to 2.7 V)



JESD8B/JESD36 (2.7 V to 3.6 V)

ESD protection:



HBM EIA/JESD22-A114F exceeds 2000 V



MM EIA/JESD22-A115-A exceeds 200 V

24

mA output drive (V

= 3.0 V)

CMOS low power consumption

Open-drain outputs

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

Multiple package options

Specified from

40 C

to +85

C

and

40 C

to +125

C



74LVC2G38DC,125 Related Products

	74LVC2G38DC,125	74LVC2G38GD,125	74LVC2G38GS,115	74LVC2G38GF,115	74LVC2G38GM,125	74LVC2G38DP,125
Description	logic gates 3.3V dual 2-input	logic gates nand 2circuit 5.5V	translation - voltage levels 10.8ns 5.5V 300mw	logic gates dual 2-input nand gate open drain	logic gates 3.3V dual 2-inpt	logic gates 3.3V dual 2-IN nand
Brand Name	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconductor
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to
Maker	NXP	NXP	NXP	NXP	NXP	NXP
Parts packaging code	SSOP	SON	SON	SON	QFN	TSSOP
package instruction	VSSOP, TSSOP8,.12,20	3 X 2 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, SOT996-2, SON-8	1.35 X 1 MM, 0.35 MM HEIGHT, 0.35 MM PITCH, SOT-1203, SON-8	1.35 X 1 MM, 0.50 MM HEIGHT, MO-252, SOT-1089, SON-8	VQCCN, LCC8,.06SQ,20	TSSOP, TSSOP8,.16
Contacts	8	8	8	8	8	8
Manufacturer packaging code	SOT765-1	SOT996-2	SOT1203	SOT1089	SOT902-2	SOT505-2
Reach Compliance Code	compli	compli	compli	compli	compli	compliant
Base Number Matches	1	1	1	1	1	1

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