5962F9566202VRC datasheet, PDF

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5962F9566202VRC: DescriptionACT SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20; Categorylogic logic; File Size164KB，30 Pages; ManufacturerIntersil ( Renesas ); Websitehttp://www.intersil.com/cda/home/

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5962F9566202VRC Overview

ACT SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20

5962F9566202VRC Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	1515918954
Parts packaging code	DIP
package instruction	DIP, DIP20,.3
Contacts	20
Reach Compliance Code	not_compliant
series	ACT
JESD-30 code	R-CDIP-T20
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
Maximum Frequency@Nom-Sup	75000000 Hz
MaximumI(ol)	0.008 A
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
propagation delay (tpd)	22 ns
Certification status	Not Qualified
Filter level	MIL-PRF-38535 Class V
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
total dose	300k Rad(Si) V
Trigger type	POSITIVE EDGE

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NOTICE OF REVISION (NOR)

THIS REVISION DESCRIBED BELOW HAS BEEN AUTHORIZED FOR THE DOCUMENT LISTED.

1. DATE

(YYMMDD)

98-10-16

Form Approved

OMB No. 0704-0188

Public reporting burden for this collection is estimated to average 2 hours per response, including the time for reviewing

instructions, searching existing data sources, gathering and maintaining the data needed, and completing and reviewing the

collection of information. Send comments regarding this burden estimate or any other aspect of this collection of information,

including suggestions for reducing this burden, to Department of Defense, Washington Headquarters Services, Directorate for

Information Operations and Reports, 1215 Jefferson Davis Highway, Suite 1204, Arlington, VA 22202-4302, and to the Office of

Management and Budget, Paperwork Reduction Project (0704-0188), Washington, DC 20503.

PLEASE DO NOT RETURN YOUR COMPLETED FORM TO EITHER OF THESE ADDRESSED. RETURN COMPLETED

FORM TO THE GOVERNMENT ISSUING CONTRACTING OFFICER FOR THE CONTRACT/ PROCURING ACTIVITY

NUMBER LISTED IN ITEM 2 OF THIS FORM.

2. PROCURING

ACTIVITY NO.

3. DODAAC

b. ADDRESS

(Street, City, State, Zip Code)

Defense Supply Center, Columbus

3990 East Broad Street

Columbus, OH 43216-5000

5. CAGE CODE

67268

6. NOR NO.

5962-R003-99

4. ORIGINATOR

a. TYPED NAME

(First, Middle Initial,

Last)

9. TITLE OF DOCUMENT

MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS,

OCTAL D FLIP-FLOP WITH THREE-STATE OUTPUTS, TTL COMPATIBLE

INPUTS, MONOLITHIC SILICON

7. CAGE CODE

67268

10. REVISION LETTER

8. DOCUMENT NO.

5962-95662

11. ECP NO.

No users listed.

a. CURRENT

b. NEW

12. CONFIGURATION ITEM (OR SYSTEM) TO WHICH ECP APPLIES

All

13. DESCRIPTION OF REVISION

Sheet 1: Revisions ltr column; add "B".

Revisions description column; add "Changes in accordance with NOR 5962-R003-99".

Revisions date column; add "98-10-16".

Revision level block; change from “A” to "B".

Rev status of sheets; for sheet 1 change from “A” to “B” , for sheets 3, 4 and 18 through 24, add "B".

Sheet 3: 1.3 Absolute maximum ratings, Supply voltage range (V

); change limits from “-0.5 V dc to +6.0 V dc , to “-0.5 V dc to +7.0 V dc”.

Sheet 4: Add new paragraph which states; "3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to

this document."

Revision level block; add "B".

Sheets 18 through 24: Add attached appendix A.

CONTINUED ON NEXT SHEETS

14. THIS SECTION FOR GOVERNMENT USE ONLY

(X one)

(1) Existing document supplemented by the NOR may be used in manufacture.

(2) Revised document must be received before manufacturer may incorporate this change.

(3) Custodian of master document shall make above revision and furnish revised document.

b. ACTIVITY AUTHORIZED TO APPROVE CHANGE FOR

GOVERNMENT

DSCC-VAS

d. TITLE

CHIEF, MICROELECTRONICS TEAM

15a. ACTIVITY ACCOMPLISHING REVISION

DSCC-VAS

DD Form 1695, APR 92

e. SIGNATURE

RAYMOND L. MONNIN

b. REVISION COMPLETED

(Signature)

TIN H. LE

Previous editions are obsolete.

f. DATE SIGNED

(YYMMDD)

98-10-16

c. DATE SIGNED

(YYMMDD)

98-10-16

c. TYPED NAME

(First, Middle Initial, Last)

RAYMOND L. MONNIN

APPENDIX A

APPENDIX A FORMS A PART OF SMD 5962-95662

Document No: 5962-95662

Revision: B

NOR No: 5962-R003-99

Sheet: 4 of 8

SPECIFICATION

DEPARTMENT OF DEFENSE

MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.

STANDARDS

DEPARTMENT OF DEFENSE

MIL-STD-883 - Test Method Standard Microcircuits.

HANDBOOK

DEPARTMENT OF DEFENSE

MIL-HDBK-103 - List of Standard Microcircuit Drawings.

(Copies of the specification, standards, bulletin, and handbook required by manufacturers in connection with specific acquisition

functions should be obtained from the contracting activity or as directed by the contracting activity).

20.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of

this drawing shall take precedence.

30. REQUIREMENTS

30.1 Item Requirements. The individual item requirements for device classes Q and V shall be in accordance with

MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The

modification in the QM plan shall not effect the form, fit or function as described herein.

30.2 Design, construction and physical dimensions. The design, construction and physical dimensions shall be as specified in

MIL-PRF-38535 and the manufacturer’s QM plan, for device classes Q and V and herein.

30.2.1 Die Physical dimensions. The die physical dimensions shall be as specified in 10.2.4.1 and on figure A-1.

30.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as

specified in 10.2.4.2 and on figure A-1.

30.2.3 Interface materials. The interface materials for the die shall be as specified in 10.2.4.3 and on figure A-1.

30.2.4 Assembly related information. The assembly related information shall be as specified in 10.2.4.4 and figure A-1.

30.2.5 Truth table. The truth table shall be as defined within paragraph 3.2.3 of the body of this document.

30.2.6 Radiation exposure circuit. The radiation exposure circuit shall be as defined within paragraph 3.2.6 of the body of this

document.

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216-5000

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-95662

SHEET

APPENDIX A

APPENDIX A FORMS A PART OF SMD 5962-95662

Document No: 5962-95662

Revision: B

NOR No: 5962-R003-99

Sheet: 5 of 8

30.3 Electrical performance characteristics and post- irradiation parameter limits. Unless otherwise specified herein, the

electrical performance characteristics and post-irradiation parameter limits are as specified in table I of the body of this document.

30.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing sufficient to

make the packaged die capable of meeting the electrical performance requirements in table I.

30.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a customer,

shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed in 10.2

herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535.

30.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a

QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 60.4 herein). The certificate of

compliance submitted to DSCC-VA prior to listing as an approved source of supply for this appendix shall affirm that the

manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein.

30.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall

be provided with each lot of microcircuit die delivered to this drawing.

40. QUALITY ASSURANCE PROVISIONS

40.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance

with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM

plan shall not effect the form, fit or function as described herein.

40.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the

manufacturer’s QM plan. As a minimum it shall consist of:

a) Wafer Lot acceptance for Class V product using the criteria defined within MIL-STD-883 TM 5007.

b) 100% wafer probe (see paragraph 30.4).

c) 100% internal visual inspection to the applicable class Q or V criteria defined within MIL-STD-883 TM2010

or the alternate procedures allowed within MIL-STD-883 TM5004.

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216-5000

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-95662

SHEET

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