EEWORLDEEWORLDEEWORLD

Part Number

Search

395177004

Description
Strip Terminal Block, 1 Row(s), 1 Deck(s), ROHS COMPLIANT
CategoryThe connector    terminals   
File Size276KB,2 Pages
ManufacturerMolex
Websitehttps://www.molex.com/molex/home
Environmental Compliance
Download Datasheet Parametric View All

395177004 Overview

Strip Terminal Block, 1 Row(s), 1 Deck(s), ROHS COMPLIANT

395177004 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
package instructionROHS COMPLIANT
Reach Compliance Codeunknown
ECCN codeEAR99
Is SamacsysN
Other featuresNYLON 66
Fastening methodSCREW
Manufacturer's serial number39517
Number of layers1
Rows1
Number of channels4
Terminal and terminal strip typesSTRIP TERMINAL BLOCK
Wire gauge16 AWG
Base Number Matches1
MSP430 MCU controls IO port operation - LED flashes.doc
MSP430 entry-level routine!...
wpdy Microcontroller MCU
Image Acquisition and Recognition System Based on TMS320VC5509A
Image Acquisition and Recognition System Based on TMS320VC5509A...
shaomingyi DSP and ARM Processors
[Rawpixel RVB2601 development board trial experience] 4. General hardware timer test
4. General Hardware Timer TestWhen using an operating system, if some tasks are performed in a software dead-wait manner, the system efficiency will inevitably be affected. Therefore, some slow period...
gs001588 XuanTie RISC-V Activity Zone
ADC, after 32 conversions, the digital tube stops displaying. What's the problem?
[i=s]This post was last edited by dontium on 2015-1-23 12:51[/i]/******************************************* ADC conversion channel port is P1.1. When the analog value of this program is greater than ...
flyingheartt Analogue and Mixed Signal
Ask a question about Verilog
I am a FPGA newbie, and now I have a Verilog question I would like to ask For example, there is an input data input [16:0] REG For ease of use, I now want to disassemble REG, such as a = REG[16:8]; b ...
littleshrimp FPGA/CPLD
Analog Reflection Topology Building Blocks for
The synthesis and realization of an analog-phaseshifter, delay line, attenuator, and group delay synthesizer-arepresented. These variable control devices are all implementedusing the same generic sing...
JasonYoo Industrial Control Electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 21  282  853  1794  2427  1  6  18  37  49 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号