TLV320AIC1103PBS datasheet, PDF

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TLV320AIC1103PBS: DescriptionProgrammable PCM Codec With Microphone Amps & Speaker Driver 32-TQFP -40 to 85; CategoryWireless rf/communication Telecom circuit; File Size960KB，33 Pages; ManufacturerRochester Electronics; Websitehttps://www.rocelec.com/; Environmental Compliance

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TLV320AIC1103PBS Overview

Programmable PCM Codec With Microphone Amps & Speaker Driver 32-TQFP -40 to 85

TLV320AIC1103PBS Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Rochester Electronics
Parts packaging code	QFP
package instruction	TQFP-32
Contacts	32
Reach Compliance Code	compliant
Factory Lead Time	1 week
Is Samacsys	N
Law of compression and extension	A/MU-LAW
filter	YES
Maximum gain tolerance	1 dB
Enter code	TWOS COMPLEMENT
input type	"SINGLE-ENDED,DIFF"
JESD-30 code	S-PQFP-G32
JESD-609 code	e4
length	5 mm
linear encoding	15-BIT
Humidity sensitivity level	3
Number of channels	2
Number of functions	1
Number of terminals	32
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
output	VOLTAGE
output code	TWOS COMPLEMENT
Package body material	PLASTIC/EPOXY
encapsulated code	TFQFP
Encapsulate equivalent code	TQFP32,.28SQ
Package shape	SQUARE
Package form	FLATPACK, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
power supply	3 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum slew rate	0.007 mA
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	PCM CODEC
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	5 mm
Base Number Matches	1

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TLV320AIC1103

SLAS356 − DECEMBER 2001

PCM CODEC

FEATURES

2.7-V Operation

Two Differential Microphone Inputs, One

Differential Earphone Output, and One

Single-Ended Earphone Output

Programmable Gain Amplifiers for Transmit,

Receive, Sidetone, and Volume Control

Earphone Mute and Microphone Mute

On-Chip I

C Bus, Which Provides a Simple,

Standard, Two-Wire Serial Interface With

Digital ICs

Programmable for 15-Bit Linear Data or 8-Bit

Companded (µ-Law or A-Law) Data

Available in a 32-Pin Thin Quad Flatpack

(TQFP) Package and an 80-Pin GQE MicroStar

Juniort Ball Grid Array (BGA)

Designed for Analog and Digital Wireless

Handsets and Telecommunications

Applications

Dual-Tone Multifrequency (DTMF) and Single

Tone Generator

Pulse Density Modulated (PDM) Buzzer

Output

DESCRIPTION

The PCM codec is designed to perform transmit

encoding analog/digital (A/D) conversion, receive

decoding digital/analog (D/A) conversion, and transmit

and receive filtering for voice-band communications

systems. The device operates in either the 15-bit linear

or 8-bit companded

(µ-law

or A-Law) mode, which is

selectable through the I

C interface. The PCM codec

generates its own internal clocks from a 2.048-MHz

master clock input.

PBS PACKAGE

(TOP VIEW)

24 23 22 21 20 19 18 17

PLLVSS

VSS

MCLK

RESET

PWRUPSEL

BUZZCON

PCMSYN

PCMCLK

PLLV

EARV

EAR1ON

EARV

EAR1OP

EARV

EAR2O

4 5 6 7

APPLICATIONS

Digital Handset

Digital Headset

Cordless Phones

Digital PABX

Digital Voice Recording

PCMO

PCMI

SCL

SDA

NC − No internal connection

This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These

circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C,

Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated

voltages to these high-impedance circuits. During storage or handling, the device leads should be shorted together or the device

should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriated logic voltage level,

preferably either VCC or ground. Specific guidelines for handling devices of this type are contained in the publication

Guidelines for

Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies

available from Texas Instruments.

MicroStar Junior is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

MBIAS

MIC1P

MIC1N

MIC2P

MIC2N

REXT

AVSS



2001, Texas Instruments Incorporated

www.ti.com

TLV320AIC1103

SLAS356 − DECEMBER 2001

functional description

power on/reset

The power for the various digital and analog circuits is separated to improve the noise performance of the

device. An external reset must be applied to the active low RESET terminal to assure reset upon power on. After

the initial power-on sequence the TLV320AIC1103 can be functionally powered up and down by writing to the

power control register through the I

C interface. There is a hardwired selectable power-up terminal in default

mode option. The PWRUPSEL function allows the VBAP to power up in the default mode and allows use without

a microcontroller.

reference

A precision band gap reference voltage is generated internally and supplies all required voltage references to

operate the transmit and receive channels. The reference system also supplies bias voltage for use with an

electret microphone at terminal MBIAS. An external precision resistor is required for reference current setting

at terminal REXT.

control interface

The I

C interface is a two-wire bidirectional serial interface that controls the PCM codec by writing data to the

six control registers:

Power control

Mode control

Transmit PGA and sidetone control

Receive PGA gain and volume control

DTMF high tone

DTMF low tone

There are two power-up modes which may be selected at the PWRUPSEL terminal:

The PWRUPSEL state (V

at terminal 20) causes the device to power up in the default mode when power

is applied. In the default mode, the I

C interface is not required, and the device may be used without an I

interface. The programmable functions are fixed in the default modes.

is applied. In this mode an I

C interface is required to power up the device.

The PWRUPSEL state (ground at terminal 20) causes the device to go to a power-down state when power

phase-locked loop

The internal digital filters and modulators require a 10.24-MHz clock that is generated by phase locking to the

2.048-MHz master clock input.

PCM interface

The PCM interface transmits and receives data at the PCMO and PCMI terminals respectively. The data is

transmitted or received at the PCMCLK speed once every PCMSYN cycle. The PCMCLK can be tied directly

to the 2.048-MHz master clock (MCLK). The PCMSYN can be driven by an external source or derived from the

master clock and used as an interrupt to the host controller.

microphone amplifiers

The microphone input is a switchable interface for two differential microphone inputs. The first stage is a low-

noise differential amplifier that provides a gain of 23.5 dB. The second stage amplifier has a selectable gain of

0 dB or 12 dB.

www.ti.com

TLV320AIC1103

SLAS356 − DECEMBER 2001

functional description (continued)

analog modulator

The transmit channel modulator is a third-order sigma-delta design.

transmit filter and PGA

The transmit filter is a digital filter designed to meet CCITT G.714 requirements. The device operates in either

the 15-bit linear or 8-bit companded

µ-law

or A-law mode that is selectable through the I

C interface. The

transmit PGA defaults to 0 dB.

sidetone

A portion of the transmitted audio is attenuated and fed back to the receive channel through the sidetone path.

The sidetone path defaults to −12 dB. The sidetone path can be enabled by writing to the power control register.

receive volume control

The receive volume control block acts as an attenuator with a range of −18 dB to 0 dB in 2 dB steps for control

of the receive channel volume. The receive volume control gain defaults to 0 dB.

receive filter and PGA

The receive filter is a digital filter that meets CCITT G.714 requirements with a high-pass filter that is selectable

through the I

C interface. The device operates in either the 15-bit linear or 8-bit

µ-law

or A-law companded

mode, which is selectable through the I

C interface. The gain defaults to −1 dB representing a 3-dBm0 level

for a 32-Ω load impedance and the corresponding digital full scale PCMI code. The gain may be set to −2 dB

for the respective 3-dBm0 level for a 16-

Ω

load impedance.

digital modulator and filter

The second-order digital modulator and filter convert the received digital PCM data to the analog output required

by the earphone interface.

earphone amplifiers

The analog signal can be routed to either of two earphone amplifiers, one with differential output (EAR1ON and

EAR1OP) and one with single-ended output (EAR2O). Clicks and pops are suppressed for EAR1 differential

output only.

tone generator

The tone generator provides generation of standard DTMF tones and single tone frequencies which are output

to the following devices: 1) the buzzer driver, as a pulse density modulation (PDM) signal, and 2) the receive

path digital/analog converter (DAC) for outputting through the earphone. There are 255 possible single tones.

The tone integer value is determined by the following formula:

Round (Tone Freq (Hz)/7.8135 Hz)

The value is loaded into one of two 8-bit registers, the high-tone register (04), or the low-tone register (05). The

tone output is 2 dB higher when applied to the high-tone register (04). When generating DTMF tones, the high

DTMF tone must be applied to the high-tone register and the low frequency tone to the low-tone register.

www.ti.com

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