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3D7304-50

Description
Silicon Delay Line, 4-Func, 1-Tap, True Output, CMOS, PDIP14, 0.300 INCH, DIP-14
Categorylogic    logic   
File Size38KB,4 Pages
ManufacturerData Delay Devices
Download Datasheet Parametric View All

3D7304-50 Overview

Silicon Delay Line, 4-Func, 1-Tap, True Output, CMOS, PDIP14, 0.300 INCH, DIP-14

3D7304-50 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeDIP
package instructionDIP,
Contacts14
Reach Compliance Codecompliant
seriesCMOS/TTL
Input frequency maximum value (fmax)6.67 MHz
JESD-30 codeR-PDIP-T14
length19.305 mm
Logic integrated circuit typeSILICON DELAY LINE
Number of functions4
Number of taps/steps1
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
programmable delay lineNO
Certification statusNot Qualified
Maximum seat height4.58 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Total delay nominal (td)50 ns
width7.62 mm
Base Number Matches1
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