BUK9215-55A
7 April 2014
N-channel TrenchMOS logic level FET
Product data sheet
1. General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
2. Features and benefits
•
•
•
•
AEC Q101 compliant
Low conduction losses due to low on-state resistance
Suitable for logic level gate drive sources
Suitable for thermally demanding environments due to 175 °C rating
3. Applications
•
•
•
12 V and 24 V loads
Automotive and general purpose power switching
Motors, lamps and solenoids
4. Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
V
GS
= 5 V; T
mb
= 25 °C;
Fig. 2; Fig. 3
T
mb
= 25 °C;
Fig. 1
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C
V
GS
= 4.5 V; I
D
= 25 A; T
j
= 25 °C
V
GS
= 5 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 11; Fig. 12
Dynamic characteristics
Q
GD
gate-drain charge
V
GS
= 5 V; I
D
= 25 A; V
DS
= 44 V;
T
j
= 25 °C;
Fig. 9
-
20
-
nC
[1]
Min
-
-
-
Typ
-
-
-
Max
55
62
115
Unit
V
A
W
Static characteristics
drain-source on-state
resistance
-
-
-
11
-
13
13.6
16.6
15
mΩ
mΩ
mΩ
Nexperia
BUK9215-55A
N-channel TrenchMOS logic level FET
Symbol
E
DS(AL)S
Parameter
non-repetitive drain-
source avalanche
energy
[1]
Conditions
I
D
= 62 A; V
sup
≤ 55 V; R
GS
= 50 Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped
Min
-
Typ
-
Max
211
Unit
mJ
Avalanche ruggedness
Current is limited by power dissipation chip rating.
5. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
source
mounting base; connected to
drain
2
1
3
Simplified outline
mb
Graphic symbol
D
G
mbb076
S
DPAK (SOT428)
6. Ordering information
Table 3.
Ordering information
Package
Name
BUK9215-55A
DPAK
Description
plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
Version
SOT428
Type number
BUK9215-55A
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
7 April 2014
2 / 13
Nexperia
BUK9215-55A
N-channel TrenchMOS logic level FET
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
DGR
V
GS
P
tot
I
D
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
total power dissipation
drain current
T
mb
= 25 °C;
Fig. 1
T
mb
= 25 °C; V
GS
= 5 V;
Fig. 2; Fig. 3
T
mb
= 100 °C; V
GS
= 5 V;
Fig. 2
I
DM
T
stg
T
j
I
S
I
SM
E
DS(AL)S
peak drain current
storage temperature
junction temperature
T
mb
= 25 °C; pulsed; t
p
≤ 10 µs;
Fig. 3
[1]
[2]
[1]
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
R
GS
= 20 kΩ
Min
-
-
-15
-
-
-
-
-
-55
-55
Max
55
55
15
115
62
55
44
248
175
175
Unit
V
V
V
W
A
A
A
A
°C
°C
Source-drain diode
source current
peak source current
T
mb
= 25 °C
pulsed; t
p
≤ 10 µs; T
mb
= 25 °C
I
D
= 62 A; V
sup
≤ 55 V; R
GS
= 50 Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped
[2]
[1]
-
-
-
55
62
248
A
A
A
Avalanche ruggedness
non-repetitive drain-source
avalanche energy
[1]
[2]
-
211
mJ
Current is limited by power dissipation chip rating.
Continious current is limited by bond wires.
BUK9215-55A
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
7 April 2014
3 / 13
Nexperia
BUK9215-55A
N-channel TrenchMOS logic level FET
120
P
der
(%)
80
03aa16
80
I
D
(A)
60
03nf79
Capped at 55 A due to limitation of bondwires
40
40
20
0
0
50
100
150
T
mb
(°C)
200
0
25
50
75
100
125
150
175
200
T
mb
(°C)
Fig. 1.
Normalized total power dissipation as a
function of mounting base temperature
Fig. 2.
Continuous drain current as a function of
mounting base temperature
10
3
I
D
(A)
R
DSon
= V
DS
/ I
D
10
2
03nf78
t
p
= 10 µs
100 µs
t
p
T
1 ms
10 ms
t
p
1
1
t
T
10
V
DS
(V)
10
2
100 ms
10
P
δ=
DC
Fig. 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9215-55A
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
7 April 2014
4 / 13
Nexperia
BUK9215-55A
N-channel TrenchMOS logic level FET
8. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
thermal resistance
from junction to
ambient
10
Z
th(j-mb)
(K/W)
1
δ = 0.5
0.2
10
- 1
0.1
0.05
0.02
10
- 2
P
δ=
t
p
T
Conditions
Fig. 4
Min
-
Typ
-
Max
1.3
Unit
K/W
R
th(j-a)
-
71.4
-
K/W
03nf77
Single Shot
t
p
t
T
t
p
(s)
1
10
- 3
10
- 6
10
- 5
10
- 4
10
- 3
10
- 2
10
- 1
Fig. 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9215-55A
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
7 April 2014
5 / 13
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