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DSC510-051244KI0T

Description
OTHER CLOCK GENERATOR
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size684KB,10 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
Download Datasheet Parametric View All

DSC510-051244KI0T Overview

OTHER CLOCK GENERATOR

DSC510-051244KI0T Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerMicrochip
package instructionHVQCCN,
Reach Compliance Codecompliant
ECCN codeEAR99
Is SamacsysN
Other featuresELIMINATED THE EXT QUARTZ CRYSTAL AND USED MEMS CLOCK GENERATORS AS EXT CLOCK
JESD-30 codeR-XQCC-N20
length5 mm
Humidity sensitivity level1
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency460 MHz
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Package shapeRECTANGULAR
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
Filter levelAEC-Q100
Maximum seat height0.9 mm
Maximum supply voltage3.6 V
Minimum supply voltage2.25 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature40
width3.2 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
DSC510-05
Crystal-less™ Four Output LAN Clock Generator
General Description
The DSC510-05 is a Crystal-less™, four
output clock generator that implements
Discera’s
proven
PureSilicon™
MEMS
technology.
The devices implements
proven silicon MEMS technology to provide
excellent jitter and stability over a wide
range of supply voltages and temperatures.
By eliminating the external quartz crystal,
MEMS
clock
generators
significantly
enhance reliability and accelerate product
development, while meeting stringent clock
performance criteria for a variety of
communications, storage, and networking
applications.
DSC510-05 has an Output Enable / Disable
feature allowing it to disable all outputs
when OE1 and OE2 are low. Each output
enable pin controls one of the two banks of
synchronous clocks. See the OE function
table 1 for more detail.
The device is
available in a 20 pin QFN. Additional output
formats are in any combination of LVPECL,
LVDS, LVCMOS and HCSL.
Features
Four 25MHz LVPECL Clocks
Available Output Formats:
o
o
o
o
o
HCSL, LVPECL, LVCMOS, or LVDS
Mixed Outputs: LVPECL/HCSL/LVDS/CMOS
Ext. Industrial: -40° to 105° C
Industrial: -40° to 85° C
Ext. commercial: -20° to 70° C
Wide Temperature Range
Supply Range of 2.25 to 3.6 V
Low Power Consumption
o
o
o
30% lower than competing devices
Qualified to MIL-STD-883
20 QFN
Excellent Shock & Vibration Immunity
Available Footprints:
Lead Free & RoHS Compliant
Short Lead Time: 2 Weeks
AEC-Q100 Automotive Qualified
Block Diagram
Applications
Communications/Networking
o
o
o
o
o
Ethernet/ LAN PHY
1G, 10GBASE-T/KR/LR/SR, and FcoE
Routers and Switches
Gateways, VoIP, Wireless AP’s
Passive Optical Networks
*
Clk0+/-, Clk1+/-, Clk2 +/- and Clk3 +/- are
25MHz clocks for LAN applications. For other
frequencies, please contact the factory.
_____________________________________________________________________________________________________________________________ _________________
DSC510-05
Page 1
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