72V815L10PF datasheet, PDF - EEWORLD Datasheet

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72V815L10PF: DescriptionTQFP-128, Tray; Categorystorage storage; File Size364KB，27 Pages; ManufacturerIDT (Integrated Device Technology)

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72V815L10PF Overview

TQFP-128, Tray

72V815L10PF Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	TQFP
package instruction	TQFP-128
Contacts	128
Manufacturer packaging code	PK128
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	6.5 ns
Maximum clock frequency (fCLK)	100 MHz
period time	10 ns
JESD-30 code	R-PQFP-G128
JESD-609 code	e0
length	20 mm
memory density	9216 bit
Memory IC Type	OTHER FIFO
memory width	18
Humidity sensitivity level	3
Number of functions	1
Number of terminals	128
word count	512 words
character code	512
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	512X18
Exportable	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP128,.63X.87,20
Package shape	RECTANGULAR
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum standby current	0.01 A
Maximum slew rate	0.06 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	14 mm
Base Number Matches	1

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3.3 VOLT CMOS DUAL SyncFIFO™

DUAL 256 x 18, DUAL 512 x 18,

DUAL 1,024 x 18, DUAL 2,048 x 18

and DUAL 4,096 x 18

LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018

IDT72V805

IDT72V815

IDT72V825

IDT72V835

IDT72V845

FEATURES:

•

The IDT72V805 is equivalent to two IDT72V205 256 x 18 FIFOs

The IDT72V815 is equivalent to two IDT72V215 512 x 18 FIFOs

The IDT72V825 is equivalent to two IDT72V225 1,024 x 18 FIFOs

The IDT72V835 is equivalent to two IDT72V235 2,048 x 18 FIFOs

The IDT72V845 is equivalent to two IDT72V245 4,096 x 18 FIFOs

Offers optimal combination of large capacity (8K), high speed,

design flexibility, and small footprint

Ideal for the following applications:

– Network switching

– Two level prioritization of parallel data

– Bidirectional data transfer

– Bus-matching between 18-bit and 36-bit data paths

– Width expansion to 36-bit per package

– Depth expansion to 8,192 words per package

10 ns read/write cycle time

5V input tolerant

IDT Standard or First Word Fall Through timing

Single or double register-buffered Empty and Full Flags

•

Easily expandable in depth and width

Asynchronous or coincident Read and Write Clocks

Asynchronous or synchronous programmable Almost-Empty

and Almost-Full flags with default settings

Half-Full flag capability

Output enable puts output data bus in high-impedance state

High-performance submicron CMOS technology

Available in a 128-pin thin quad flatpack (TQFP)

Industrial temperature range (–40°C to +85°C) is available

Green parts available, see ordering information

DESCRIPTION:

The IDT72V805/72V815/72V825/72V835/72V845 are dual 18-bit-wide

synchronous (clocked) First-in, First-out (FIFO) memories designed to run

off a 3.3V supply for exceptionally low power consumption. One dual

IDT72V805/72V815/72V825/72V835/72V845 device is functionally equiva-

lent to two IDT72V205/72V215/72V225/72V235/72V245 FIFOs in a single

package with all associated control, data, and flag lines assigned to

independent pins. These devices are very high-speed, low-power First-In,

FUNCTIONAL BLOCK DIAGRAM

FFA/IRA

WCLKA

WENA

HFA/(WXOA)

PAEA

EFA/

ORA

WCLKB

WENB

PAFA

-DA

LDA

DB0-DB17

LDB

INPUT

OFFSET

INPUT

OFFSET

FFB/IRB

PAFB

EFB/ORB

PAEB

HFB/(WXOB)

WRITE

CONTROL

LOGIC

WRITE

POINTER

FLA

WXIA

(HFA)/WXOA

RXIA

RXOA

RSA

RAM

ARRAY

256 x 18

512 x 18

1,024 x 18

2,048 x 18

4,096 x 18

FLAG

LOGIC

WRITE

CONTROL

LOGIC

READ

POINTER

READ

CONTROL

LOGIC

WRITE

POINTER

RAM

ARRAY

256 x 18

512 x 18

1,024 x 18

2,048 x 18

4,096 x 18

FLAG

LOGIC

READ

POINTER

READ

CONTROL

LOGIC

EXPANSION

LOGIC

OUTPUT

EXPANSION

LOGIC

OUTPUT

RESET

LOGIC

RESET

LOGIC

OEA

-QA

RCLKA

RENA

RSB

RXOB

RXIB

(HFB)/WXOB

WXIB

FLB

OEB

-QB

RCLKB

RENB

4295 drw 01

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The SyncFIFO is a trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

MARCH 2018

DSC-4295/7

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