PDTC143X/123J/143Z/114YQA
series
50 V, 100 mA NPN resistor-equipped transistors
Rev. 1 — 30 October 2015
Product data sheet
1. Product profile
1.1 General description
100 mA NPN Resistor-Equipped Transistor (RET) family in a leadless ultra small
DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible
and solderable side pads.
Table 1.
Product overview
R1
4.7 k
2.2 k
4.7 k
10 k
R2
10 k
47 k
47 k
47 k
Nexperia
DFN1010D-3
(SOT1215)
PNP complement
PDTA143XQA
PDTA123JQA
PDTA143ZQA
PDTA114YQA
Type number
PDTC143XQA
PDTC123JQA
PDTC143ZQA
PDTC114YQA
1.2 Features and benefits
100 mA output current capability
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduced pick and place costs
Low package height of 0.37 mm
AEC-Q101 qualified
Suitable for Automatic Optical
Inspection (AOI) of solder joint
1.3 Applications
Digital applications
Cost saving alternative for
BC847/BC857 series in digital
applications
Controlling IC inputs
Switching loads
1.4 Quick reference data
Table 2.
Symbol
V
CEO
I
O
Quick reference data
Parameter
collector-emitter voltage
output current
Conditions
open base
Min
-
-
Typ
-
-
Max
50
100
Unit
V
mA
Nexperia
PDTC143X/123J/143Z/114YQA
50 V, 100 mA NPN resistor-equipped transistors
2. Pinning information
Table 3.
Pin
1
2
3
4
I
GND
O
O
Pinning
Symbol
Description
input (base)
GND (emitter)
output (collector)
output (collector)
2
4
3
GND
aaa-019964
Simplified outline
Graphic symbol
O
R1
1
I
R2
Transparent top view
3. Ordering information
Table 4.
Ordering information
Package
Name
PDTC143XQA
PDTC123JQA
PDTC143ZQA
PDTC114YQA
DFN1010D-3
Description
plastic thermal enhanced ultra thin small outline
package; no leads; 3 terminals;
body: 1.1
1.0
0.37 mm
Version
SOT1215
Type number
PDTC143X_123J_143Z_114YQA_SER
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 30 October 2015
2 of 22
Nexperia
PDTC143X/123J/143Z/114YQA
50 V, 100 mA NPN resistor-equipped transistors
4. Marking
Table 5.
Marking codes
Marking code
11 11 01
10 11 11
11 00 11
11 10 01
Type number
PDTC143XQA
PDTC123JQA
PDTC143ZQA
PDTC114YQA
4.1 Binary marking code description
READING
DIRECTION
MARKING CODE
(EXAMPLE)
YEAR DATE
CODE
VENDOR CODE
PIN 1
INDICATION MARK
MARK-FREE AREA
READING EXAMPLE:
11
01
10
aaa-008041
Fig 1.
SOT1215 binary marking code description
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
PDTC143XQA
PDTC123JQA
PDTC143ZQA
PDTC114YQA
-
-
-
-
7
5
5
6
V
V
V
V
Conditions
open emitter
open base
Min
-
-
Max
50
50
Unit
V
V
PDTC143X_123J_143Z_114YQA_SER
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 30 October 2015
3 of 22
Nexperia
PDTC143X/123J/143Z/114YQA
50 V, 100 mA NPN resistor-equipped transistors
Table 6.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
I
Parameter
input voltage
PDTC143XQA
PDTC123JQA
PDTC143ZQA
PDTC114YQA
I
O
P
tot
T
j
T
amb
T
stg
[1]
[2]
Conditions
Min
7
5
5
6
-
Max
+30
+12
+30
+40
100
280
440
150
+150
+150
Unit
V
V
V
V
mA
mW
mW
C
C
C
output current
total power dissipation
junction temperature
ambient temperature
storage temperature
T
amb
25
C
[1]
[2]
-
-
-
55
65
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.
500
P
tot
(mW)
400
aaa-017637
(1)
300
(2)
200
100
0
-75
-25
25
75
125
175
T
amb
(°C)
(1) FR4 PCB, 4-layer copper, standard footprint
(2) FR4 PCB, standard footprint
Fig 2.
Power derating curves
PDTC143X_123J_143Z_114YQA_SER
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 30 October 2015
4 of 22
Nexperia
PDTC143X/123J/143Z/114YQA
50 V, 100 mA NPN resistor-equipped transistors
6. Thermal characteristics
Table 7.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction
to ambient
Conditions
in free air
[1]
[2]
Min
-
-
Typ
-
-
Max
446
284
Unit
K/W
K/W
[1]
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.50
0.33
0.20
0.10
0.05
10
0.02
aaa-017638
0.01
0
1
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, single-sided copper, tin-plated and standard footprint
Fig 3.
10
3
Z
th(j-a)
(K/W)
10
2
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
aaa-017639
duty cycle = 1
0.75
0.50
0.33
0.20
0.10
0.05
10
0.02
0
0.01
1
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, 4-layer copper, tin-plated and standard footprint.
Fig 4.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PDTC143X_123J_143Z_114YQA_SER
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 30 October 2015
5 of 22
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