UCC20225AQNPLTQ1 datasheet, PDF

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UCC20225AQNPLTQ1: DescriptionIsolated dual-channel gate driver with single input in LGA for automotive 48-V systems with 5-V UVLO 13-VLGA -40 to 125; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size2MB，48 Pages; ManufacturerAVX; Environmental Compliance

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UCC20225AQNPLTQ1 Overview

Isolated dual-channel gate driver with single input in LGA for automotive 48-V systems with 5-V UVLO 13-VLGA -40 to 125

UCC20225AQNPLTQ1 Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	AVX
package instruction	VLGA-13
Reach Compliance Code	compliant
Factory Lead Time	6 weeks
Samacsys Description	Gate Drivers Isolated dual-channel gate driver with single input in LGA for automotive 48-V systems with 5-V UVLO 13-VLGA -40 to 125
Built-in protection	TRANSIENT; UNDER VOLTAGE
Interface integrated circuit type	BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 code	S-PBGA-N13
length	5 mm
Humidity sensitivity level	3
Number of functions	2
Number of terminals	13
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output current flow direction	SOURCE AND SINK
Maximum output current	6 A
Package body material	PLASTIC/EPOXY
encapsulated code	VFLGA
Package shape	SQUARE
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Filter level	AEC-Q100
Maximum seat height	1 mm
Maximum supply voltage	18 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
Temperature level	AUTOMOTIVE
Terminal form	NO LEAD
Terminal pitch	0.65 mm
Terminal location	BOTTOM
Disconnect time	0.03 µs
connection time	0.03 µs
width	5 mm
Base Number Matches	1

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UCC20225-Q1, UCC20225A-Q1

SLUSDC2C – NOVEMBER 2018 – REVISED SEPTEMBER 2019

UCC20225-Q1, UCC20225A-Q1 Isolated Dual-Channel Gate Driver with Single Input in LGA

for Automotive 48-V Systems

1 Features

3 Description

The UCC20225-Q1 family are single-input, dual-

output isolated gate drivers with 4-A source and 6-A

sink peak current in 5-mm x 5-mm LGA-13. It is

designed to drive power transistors up to 5-MHz with

best-in-class propagation delay and pulse-width

distortion.

The input side is isolated from the two output drivers

by a 2.5-kV

RMS

isolation barrier, with minimum 100-

V/ns common-mode transient immunity (CMTI).

Internal functional isolation between the two output-

side drivers allows working voltage up to 700-V

The UCC20225-Q1 family allow programmable dead

time through a resistor on DT pin. A DIS pin shuts

down both outputs simultaneously when set high, and

allows normal operation when left grounded.

The device accepts VDD supply voltages up to 25-V.

A wide VCCI range from 3-V to 18-V makes the

driver suitable for interfacing with both analog and

digital controllers. All supply voltage pins have under

voltage lock-out (UVLO) protection.

With all these advanced features, the UCC20225-Q1

family enables high power density, high efficiency,

and robustness in a variety of automotive

applications.

Device Information

(1)

PART NUMBER

UCC20225A-Q1

UCC20225-Q1

PACKAGE

LGA (13) 5 × 5 mm

UVLO

•

AEC Q100 qualified with:

– Device temperature grade 1

– Device HBM ESD classification level H2

– Device CDM ESD classification level C6

Single PWM input, dual output

Resistor-programmable dead time

4-A peak source, 6-A peak sink output

CMTI greater than 100-V/ns

Switching parameters:

– 19-ns typical propagation delay

– 5-ns maximum delay matching

– 6-ns maximum pulse-width distortion

3-V to 18-V input VCCI range

Up to 25-V VDD with 5V and 8-V UVLO Options

Rejects input transients shorter than 5-ns

TTL and CMOS compatible inputs

5-mm x 5-mm space-saving LGA-13 Package

Safety-related certifications:

– 3535-V

isolation per VDE V 0884-11:2017

– 2500-V

RMS

isolation for 1 minute per UL 1577

– CQC Certification per GB4943.1-2011

2 Applications

•

Automotive external audio amplifier

Automotive 48-V systems

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Functional Block Diagram

VDD

VCC

PWM

BOOT

HV DC-Link

PWM

VDDA

VCCI

VCC

GND

Analog

Digital

OUTA

VSSA

BOOT

Isolation Barrier

Input Logic

Functional

Isolation

VDDB

VDD

Disable

DIS

•2.2nF

OUTB

VCCI

VSSB

VSS

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

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