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DCR021205, DCR022405
SBVS028C – DECEMBER 2000 – REVISED NOVEMBER 2016
DCR02 Miniature, 2-W Isolated Regulated DC-DC Converters
1 Features
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1
3 Description
The DCR02 family is a series of high-efficiency, input-
isolated, output-regulated DC/DC converters. In
addition to 2−W nominal, galvanically-isolated output
power capability, this range of converters offers very
low output noise and high accuracy.
The DCR02 family is implemented in standard
molded device packaging, providing standard JEDEC
outlines suitable for high-volume assembly.
The DCR02 family is manufactured using the same
technology as standard device packages, thereby
achieving very high reliability.
WARNING: This product has operational isolation and is
intended for signal isolation only. It must not be used as a
part of a safety isolation circuit requiring reinforced
isolation. See definitions in
Isolation.
1000-Vrms Isolation
UL1950 Recognized
55-W/in
3
(3.3-W/cm
3
) Power Density
10-Pin PDIP and SOP Packages
Device-to-Device Synchronization
Thermal Protection
400-kHz Switching
125 FITS at 55°C
Short-Circuit Protection
12-V and 24−V Input
5-V Output
2 Applications
•
•
•
•
Point-of-Use Power Conversion
Digital Interface Power
Ground Loop Elimination
Power-Supply Noise Reduction
Device Information
(1)
PART
NUMBER
DCR02xxxx
PACKAGE
PDIP (10)
SOP (10)
BODY SIZE (NOM)
22.86 mm × 6.61 mm
22.86 mm × 6.61 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
DCR02 Block Diagram
+V
S
V
REC
+V
OUT
SYNC
Input
Controller
LDO
Regulator
ERROR
ENABLE
-V
S
-V
OUT
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
DCR021205, DCR022405
SBVS028C – DECEMBER 2000 – REVISED NOVEMBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features
..................................................................
Applications
...........................................................
Description
.............................................................
Revision History.....................................................
Pin Configuration and Functions
.........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Overview ...................................................................
Functional Block Diagram .........................................
Feature Description...................................................
Device Functional Modes..........................................
1
1
1
2
3
4
4
4
4
4
5
6
7
7
7
9
8
Application and Implementation
........................
11
8.1 Application Information............................................
11
8.2 Typical Application .................................................
13
9 Power Supply Recommendations......................
15
10 Layout...................................................................
15
10.1 Layout Guidelines .................................................
15
10.2 Layout Examples...................................................
15
10.3 Thermal Consideration..........................................
16
11 Device and Documentation Support
.................
17
11.1
11.2
11.3
11.4
11.5
11.6
11.7
Documentation Support .......................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
17
17
17
17
17
17
17
7
Detailed Description
..............................................
7
7.1
7.2
7.3
7.4
12 Mechanical, Packaging, and Orderable
Information
...........................................................
17
4 Revision History
Changes from Revision B (December 2007) to Revision C
•
Page
Added
ESD Ratings
table,
Feature Description
section,
Device Functional Modes, Application and Implementation
section,
Power Supply Recommendations
section,
Layout
section,
Device and Documentation Support
section, and
Mechanical, Packaging, and Orderable Information
section. .................................................................................................
1
Deleted
Ordering Information
table and
Supplemental Ordering Information
image; see
Package Option Addendum
at the end of the data sheet....................................................................................................................................................
1
Changed
DCR02 PinOut
image in
Pin Configuration and Functions
.....................................................................................
3
Changed Pin 1 From: V
S
To: +V
S
...........................................................................................................................................
3
Changed Pin 8 From: 0V
OUT
To: –V
OUT
..................................................................................................................................
3
Changed Pin 9 From: V
O
To: +V
OUT
.......................................................................................................................................
3
Changed Pin 17 From: 0V
IN
To: –V
S
......................................................................................................................................
3
Deleted Lead temperature (PDIP package), 270°C maximum, from
Absolute Maximum Ratings
table ...............................
4
Added
Isolation
subsection to the
Feature Description
..........................................................................................................
7
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•
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2
Submit Documentation Feedback
Copyright © 2000–2016, Texas Instruments Incorporated
Product Folder Links:
DCR021205 DCR022405
DCR021205, DCR022405
www.ti.com
SBVS028C – DECEMBER 2000 – REVISED NOVEMBER 2016
5 Pin Configuration and Functions
NVE or DVS Package
10-Pin PDIP or SOP
Top View
+V
S
NC
1
2
18
17
SYNC
-V
S
DCR02
V
REC
-V
OUT
+V
OUT
7
8
9
12
11
10
ERROR
ENABLE
DNC
Pin Functions
PIN
NO.
1
2
7
8
9
10
11
12
17
18
(1)
NAME
+V
S
NC
V
REC
–V
OUT
+V
OUT
DNC
ENABLE
ERROR
–V
S
SYNC
I = input and O = output
I/O
(1)
I
—
O
O
O
—
I
O
I
I
Voltage input
No connection
Rectified output
Output ground
Voltage output
Do not connect
Output voltage enable
Error flag active low
Input ground
Synchronization input
DESCRIPTION
Copyright © 2000–2016, Texas Instruments Incorporated
Submit Documentation Feedback
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Product Folder Links:
DCR021205 DCR022405
DCR021205, DCR022405
SBVS028C – DECEMBER 2000 – REVISED NOVEMBER 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
Input voltage
Reflow solder temperature
Storage temperature, T
stg
(1)
DCR021205
DCR022405
SOP package (surface temperature of device body or pins)
–60
MAX
15
29
260
125
UNIT
V
°C
°C
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended
Operating Conditions.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
V
(ESD)
(1)
(2)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101
(2)
UNIT
V
±1000
±250
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
Input voltage
Operating temperature
DCR021205
DCR022405
10.8
21.6
–40
NOM
12
24
MAX
13.2
26.4
70
UNIT
V
°C
6.4 Thermal Information
DCR02
THERMAL METRIC
(1)
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
(1)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
NVE (PDIP)
10 PINS
60
26
24
7
24
DVS (SOP)
10 PINS
60
26
24
7
24
°C/W
°C/W
°C/W
°C/W
°C/W
UNIT
For more information about traditional and new thermal metrics, see the
Semiconductor and IC Package Thermal Metrics
application
report.
4
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Copyright © 2000–2016, Texas Instruments Incorporated
Product Folder Links:
DCR021205 DCR022405
DCR021205, DCR022405
www.ti.com
SBVS028C – DECEMBER 2000 – REVISED NOVEMBER 2016
6.5 Electrical Characteristics
At T
A
= +25°C, V
S
= nominal, I
OUT
= 10 mA, C
OUT
= 0.1-µF ceramic, and C
IN
= 2.2-µF ceramic, unless otherwise noted.
(1)
PARAMETER
OUTPUT
Nominal output voltage (+V
OUT
)
Setpoint accuracy
Maximum output current
Output short-circuit protected
Line regulation
Over line and load
Temperature variation
10-mA to 400-mA load, over +V
S
range
–40°C to 70°C
DCR0212 ripple, 20−MHz bandwidth, 50% load
Ripple and noise
DCR0224 ripple, 20−MHz bandwidth, 50% load
(1)
TEST CONDITIONS
MIN
TYP
5
0.5%
MAX
UNIT
V
2%
400
mA
mV/V
2.5%
Duration
Infinite
1
1%
1%
18
20
18
25
12
24
–10%
I
O
= 0 mA
15
23
250
15
17
129
8
Voltage
1
500
30
60
42.5
25
2
V
REC
100
–0.2
0.5
100
10
0.4
150
130
720
720
2.5
800
880
880
3
mA
PP
kVrms
V/s
nA
VDC
VAC
pF
V
nA
V
nA
µA
V
mA
10%
mV
PP
DCR0212 noise, 100−MHz bandwidth, 50% load
(1)
(1)
DCR0224 noise, 100−MHz bandwidth, 50% load
(1)
INPUT
Nominal voltage (+V
S
)
Voltage range
DCR021205
Supply current
DCR022405
Reflected ripple current
ISOLATION
1-s flash test
Voltage
Continuous working voltage
across isolation barrier
Barrier capacitance
OUTPUT ENABLE CONTROL
Logic high input voltage
Logic high input current
Logic low input voltage
Logic low input current
ERROR FLAG
Logic high open collector leakage
Logic low output voltage
THERMAL SHUTDOWN
Junction temperature
SYNCHRONIZATION PIN
Internal oscillator frequency
External synchronization frequency
External synchronization signal high
(1)
Ceramic capacitors, C
IN
= 2.2 µF, C
FILTER
= 1 µF, and C
OUT
= 0.1 µF.
Temp activated
Temp deactivated
V
ERROR
= 5 V
Sinking 2 mA
0 < V
ENABLE
< 0.5
2 < V
ENABLE
< V
REG
dV/dt
Leakage current
DC
AC
20−MHz bandwidth, 100% load
(1)
DCR022405
DCR021205
V
I
O
= 10 mA
I
O
= 400 mA
I
O
= 0 mA
I
O
= 10 mA
I
O
= 400 mA
°C
kHz
kHz
V
Copyright © 2000–2016, Texas Instruments Incorporated
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DCR021205 DCR022405
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