The relationship between loading of the OUT0 signal and other outputs determines the input-output delay. Zero delay is achieved when
all outputs, including feedback, are loaded equally.
Maximum Ratings
Supply Voltage to Ground Potential ............................................................................................................................. –0.5V to +7.0V
DC Input Voltage (Except CLKIN) ......................................................................................................................–0.5V to V
DD
+0.5V
DC Input Voltage CLKIN .................................................................................................................................................... –0.5 to 7V
Storage Temperature .................................................................................................................................................. –65ºC to +150ºC
Maximum Soldering Temperature (10 seconds) ......................................................................................................................... 260ºC
Junction Temperature .................................................................................................................................................................. 150ºC
Static Discharge Voltage (per MIL-STD-883, Method 3015).................................................................................................. >2000V
Operating Conditions
(V
CC
= 3.3V ±0.3V)
Parameter
V
DD
T
A
C
L
C
IN
Supply Voltage
Commerical Operating Temperature
Industrial Operating Temperature
Load Capacitance, below 100 MHz
Load Capacitance, from 100 MHz to 133
Input Capacitance
Description
Min.
3.0
0
-40
Max.
3.6
70
85
30
15
7
pF
Units
V
°C
08-0298
2
PS8592H
11/13/08
PI6C2405A
Zero Delay Clock Buffer
DC Electrical Characteristics for Industrial Temperature Devices
Parameter
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
I
DD
Description
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
Supply Current
V
IN
= 0V
V
IN
= V
DD
I
OL
= -8mA(-1); I
OL
= 12mA(-1H)
I
OH
= -8mA(-1); I
OH
= -12mA(-1H)
Unloaded outputs 100 MHz, Select inputs at V
DD
or GND
Unloaded outputs 66 MHz, CLKIN
2.4
54
39
2.0
50
125
0.4
Test Conditions
Min.
Max.
0.8
Units
V
μA
V
mA
AC Electrical Characteristics for Industrial Temperature Devices
Parameter
F
O
Description
Output Frequency
Duty Cycle
(1)
(-1)
t
DC
Duty Cycle
(1)
(-1H)
Rise Time
(1)
(-1)
Rise Time
(1)
(-1H)
t
F
Fall Time
(1)
(-1)
Fall Time
(1)
(-1H)
t
sk(o)
t
0
t
SK(D)
t
SLEW
t
JIT
t
LOCK
Output to Output
skew (-1, -1H)
(1)
Delay, CLKIN Rising
Edge to OUT0 Rising
Edge
(1)
Device-to-device
skew
(1)
Output slew rate
(1)
Cycle-to-Cycle Jitter
(-1, -1H)
PLL Lock time
(1)
30pF load
15pF load
Measured at V
DD
/2, F
OUT
< 66.67MHz, 30pF load
Measured at V
DD
/2, F
OUT
< 45MHz 15pF load
Measured at V
DD
/2, F
OUT
< 100MHz 15pF load
Measured at V
DD
/2, F
OUT
< 45MHz 30pF load
Measured between 0.8V and 2.0V, 30pF load
Measured between 0.8V and 2.0V, 15pF load
Measured between 0.8V and 2.0V, 30pF load
Measured between 0.8V and 2.0V, 30pF load
Measured between 0.8V and 2.0V, 15pF load
Measured between 0.8V and 2.0V, 30pF load
All outputs equally loaded
Measured at V
DD
/2
Measured at V
DD
/2 on OUT0 pins of device
Measured between 0.8V and 2.0V on -1H device
using Test Circuit #2
Measured at 66.67 MHz, loaded 30pF load
Stable power supply, valid clocks presented on
CLKIN pin
1
200
1.0
0
0
Test Conditions
Min.
10
10
40
45
40
45
50
Typ.
Max.
100
133
60
55
60
55
2.2
1.5
1.7
2.2
1.5
1.5
200
±300
600
V/ns
ps
ms
ps
ns
%
Units
MHz
t
R
Notes:
1. See Switching Waveforms on page 5.
08-0298
3
PS8592H
11/13/08
PI6C2405A
Zero Delay Clock Buffer
DC Electrical Characteristics for Commercial Temperature Devices
Parameter
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
I
DD
Description
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
Supply Current
V
IN
= 0V
V
IN
= V
DD
I
OL
= -8mA(-1); I
OL
= 12mA(-1H)
I
OH
= -8mA(-1); I
OH
= -12mA(-1H)
Unloaded outputs 100 MHz, Select inputs at V
DD
or GND
Unloaded outputs 66.67 MHz, select inputs at V
DD
or GND
2.4
54
39
2.0
50
125
0.4
Test Conditions
Min.
Max.
0.8
Units
V
μA
V
mA
AC Electrical Characteristics for Commercial Temperature Devices
Parameter
F
O
t
DC
Description
Output Frequency
Duty Cycle
(1)
(-1)
Duty Cycle
(1)
(-1H)
Rise Time
(1)
@ 30pF
t
R
Rise Time
(1)
@ 15pF
Rise Time
(1)
@ 30pF (-1H)
Fall Time
(1)
@ 30pF
t
F
Fall Time
(1)
@ 15pF
Fall Time
(1)
@ 30pF (-1H)
t
sk(o)
t
0
t
SK(D)
t
SLEW
t
JIT
t
LOCK
Output to Output skew (-1,
-1H)
(1)
Input to output delay,
CLKIN Rising Edge to
OUT0 Rising Edge
(1)
Device-to-device skew
(1)
Output slew rate
(1)
Cycle-to-Cycle Jitter
(-1, -1H)
PLL Lock time
(1)
All outputs equally loaded
Measured at V
DD
/2
Measured at V
DD
/2 on OUT0 pins of device
Measured between 0.8V and 2.0V on -1H
device using Test Circuit #2
Measured at 66.67 MHz, loaded 30pF load
Stable power supply, valid clocks presented
on CLKIN pin
1
200
1.0
0
0
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
30pF load
15pF load
Measured at V
DD
/2, F
O
< 66 MHz, 30pF load
Measured at V
DD
/2, F
O
< 66 MHz, 30pF load
Test Conditions
Min.
10
10
40
45
50
50
Typ.
Max.
100
133
60
55
2.2
1.5
1.5
2.2
1.5
1.5
200
±300
600
V/ns
ps
ms
ps
ns
Units
MHz
%
Notes:
1. See Switching Waveforms on page 5.
08-0298
4
PS8592H
11/13/08
PI6C2405A
Zero Delay Clock Buffer
Switching Waveforms
Duty Cycle Timing
VDD/2
All Outputs Rise/Fall Time
OUTPUT
2.0V
0.8V
tR
2.0V
0.8V
tF
3.3V
0V
thigh
VDD/2
tlow
VDD/2
thigh
thigh+tlow
tDC =
Output-Output Skew
OUTPUT
VDD/2
OUTPUT
VDD/2
tSK(O)
Device-Device Skew
OUTPUT Device 1
VDD/2
OUTPUT Device 2
VDD/2
tSK(D)
Input-Output Propagation Delay
INPUT
VDD/2
VDD/2
t0
OUTPUT
0.1µF
V
DD
OUTPUTS
CLK out
CLOAD
0.1µF
V
DD
OUTPUTS
1k-ohm
CLK out
1k-ohm
10pF
0.1µF
V
DD
GND
GND
0.1µF
V
DD
GND
GND
Test Circuit 1
Test Circuit for all parameters except t
SLEW
Test Circuit 2
Test Circuit for tSLEW ,Output slew rate on –1H device
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