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5962-88724043X

Description
OT PLD, 20ns, CMOS, CQCC28, CERAMIC, LCC-28
CategoryProgrammable logic devices    Programmable logic   
File Size532KB,13 Pages
ManufacturerAtmel (Microchip)
Download Datasheet Parametric View All

5962-88724043X Overview

OT PLD, 20ns, CMOS, CQCC28, CERAMIC, LCC-28

5962-88724043X Parametric

Parameter NameAttribute value
Parts packaging codeQLCC
package instructionQCCN,
Contacts28
Reach Compliance Codeunknown
ECCN code3A001.A.2.C
Other features10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
maximum clock frequency31.2 MHz
JESD-30 codeS-CQCC-N28
JESD-609 codee0
length11.45 mm
Dedicated input times11
Number of I/O lines10
Number of terminals28
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize11 DEDICATED INPUTS, 10 I/O
Output functionMACROCELL
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCN
Package shapeSQUARE
Package formCHIP CARRIER
Programmable logic typeOT PLD
propagation delay20 ns
Certification statusNot Qualified
Maximum seat height2.54 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationQUAD
width11.45 mm
Base Number Matches1
AT22V10/L
Features
High Speed Programmable Logic Device
15 ns Max Propagation Delay
5 V
±10%
Operation
Low Power CMOS Operation
Speed
Temp
I
CC
(mA)
"L"
-15,-20
All
Com./Mil. Com./Mil. Others
12/15
90/100
55
CMOS and TTL Compatible Inputs and Outputs
10
µA
Leakage Maximum
Reprogrammable - Tested 100% for Programmability
High Reliability CMOS Technology
2000 V ESD Protection
200 mA Latchup Immunity
Full Military, Commercial and Industrial Temperature Ranges
Dual-In-Line and Surface Mount Packages
High Speed
UV Erasable
Programmable
Logic Device
Logic Diagram
Description
The AT22V10 and AT22V10L are CMOS high performance EPROM-based Program-
mable Logic Devices (PLDs). Speeds down to 15 ns and power dissipation as low as
12 mA are offered. All speed ranges are specified over the full 5 V
±10%
range. All
pins offer a low
±10 µA
leakage.
The AT22V10L provides the optimum low power CMOS PLD solution, with low DC
power (8 mA typical) and full CMOS output levels. The AT22V10L significantly re-
duces total system power and enhances system reliability.
Full CMOS output levels help reduce power in many other system components.
The AT22V10 and AT22V10L incorporate a variable product term architecture. Each
output is allocated from eight to 16 product terms, which allows highly complex logic
functions to be realized.
DIP/SOIC
PLCC
Pin Configurations
Pin Name
CLK/IN
IN
I/O
*
VCC
Function
Clock and Logic Input
Logic Inputs
Bidirectional Buffers
No Internal Connection
+5 V Supply
0023C
1-97

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