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LM3704
SNVS088F – MAY 2004 – REVISED APRIL 2016
LM3704 Voltage Supervisor With Power-Fail Input,
Low-Line Output and Manual Reset
1 Features
•
•
•
•
1
3 Description
The LM3704 is a feature-rich, easy-to-use voltage
supervisor. It is offered in both push-pull and open-
drain configuration with a tight 2% accuracy over
temperature.
The LM3704 features include a manual reset, low-line
output, and power-fail input detection. The power-fail
input allows for a configurable second rail to be
monitored helping detect upstream failures. The low-
line output is used as a second interrupt line to
indicate a fall in V
CC
(1.02 × VRST).
Device Information
(1)
PART NUMBER
LM3704
PACKAGE
VSSOP (10)
BODY SIZE (NOM)
3.00 mm × 3.00 mm
•
•
•
•
•
Available Threshold Voltage of 3.08 V and 2.32 V
No External Components Required
Manual-Reset Input
Available in Both Open-Drain and Push-Pull
Configuration
Reset Time-Out Delay of 200 ms
Separate Power-Fail Comparator
±0.5% Reset Threshold Accuracy at Room
Temperature
±2% Reset Threshold Accuracy Over
Temperature
28-µA V
CC
Supply Current
2 Applications
•
•
•
•
Embedded Controllers and Processors
Intelligent Instruments
Automotive Systems
Critical µP Power Monitoring
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
V
IN1
V
CC
V
IN2
Reset
PFI
PFO
MR
LLO
GND
INT
NMI
Reset
V
CC
PP
GND
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM3704
SNVS088F – MAY 2004 – REVISED APRIL 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features
..................................................................
Applications
...........................................................
Description
.............................................................
Revision History.....................................................
Pin Configuration and Functions
.........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
1
1
1
2
3
4
4
4
4
4
5
8
7.4 Device Functional Modes........................................
11
8
Application and Implementation
........................
12
8.1 Application Information............................................
12
8.2 Typical Application .................................................
12
8.3 System Examples ...................................................
14
9 Power Supply Recommendations......................
16
10 Layout...................................................................
16
10.1 Layout Guidelines .................................................
16
10.2 Layout Example ....................................................
16
11 Device and Documentation Support
.................
17
11.1
11.2
11.3
11.4
11.5
Device Support......................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
17
17
17
17
17
7
Detailed Description
............................................
10
7.1 Overview .................................................................
10
7.2 Functional Block Diagram .......................................
10
7.3 Feature Description.................................................
10
12 Mechanical, Packaging, and Orderable
Information
...........................................................
17
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (November 2012) to Revision F
•
Page
Added
ESD Ratings
table,
Feature Description
section,
Device Functional Modes, Application and Implementation
section,
Power Supply Recommendations
section,
Layout
section,
Device and Documentation Support
section, and
Mechanical, Packaging, and Orderable Information
section ..................................................................................................
1
2
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LM3704
Copyright © 2004–2016, Texas Instruments Incorporated
LM3704
www.ti.com
SNVS088F – MAY 2004 – REVISED APRIL 2016
5 Pin Configuration and Functions
DGS Package
10-Pin VSSOP
Top View
VCC
MR
PFI
NC
GND
1
2
3
4
5
10
9
8
7
6
RESET
NC
PFO
LLO
NC
Pin Functions
PIN
NO.
1
2
3
4
5
6
7
8
9
10
NAME
V
CC
MR
PFI
NC
GND
NC
LLO
PFO
NC
RESET
I/O
I
I
I
—
—
—
O
O
—
O
Power supply input.
Manual-reset input. When MR is less than V
MRT
(manual reset threshold) RESET/RESET is engaged.
Power-fail comparator input. When PFI is less than V
PFT
(power-fail reset threshold), the PFO goes low.
Otherwise, PFO remains high.
No connection.
Ground reference for all signals.
No connection.
Low-line logic output. Early power-fail warning output. Low when V
CC
falls below V
LLOT
(low-line output
threshold). This output can be used to generate an NMI (non-maskable interrupt) to provide an early
warning of imminent power failure.
Power-fail logic output. When PFI is below V
PFT
, PFO goes low; otherwise, PFO remains high.
No connection. Test input used at factory only. Leave floating.
Reset logic output. Pulses low for t
RP
(reset time-out period) when triggered, and stays low whenever
V
CC
is below the reset threshold or when MR is below V
MRT
. It remains low for t
RP
after either V
CC
rises
above the reset threshold, or after MR input rises above V
MRT
.
DESCRIPTION
Copyright © 2004–2016, Texas Instruments Incorporated
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LM3704
SNVS088F – MAY 2004 – REVISED APRIL 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
Supply voltage, V
CC
All other inputs
Power dissipation
Storage temperature, T
stg
(1)
(2)
–65
–0.3
–0.3
See
(2)
150
°C
MAX
6
V
CC
+ 0.3
UNIT
V
V
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended
Operating Conditions.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The maximum allowable power dissipation is a function of the maximum junction temperature, T
J
(MAX), the junction-to-ambient thermal
resistance,
θ
J-A
, and the ambient temperature, T
A
. The maximum allowable power dissipation at any ambient temperature is calculated
using:
P(MAX)
=
T
J
(MAX)
-
T
A
q
J
-
A
Where the value of
θ
J-A
for the 10-pin VSSOP package is 195°C/W in a typical printed-circuit board (PCB) mounting and the DSBGA
package is 220°C/W.
6.2 ESD Ratings
VALUE
V
(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
V
±1500
±150
Charged-device model (CDM), per JEDEC specification JESD22-C101
(2)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
T
A
Free-air temperature
–40
MAX
85
UNIT
°C
6.4 Thermal Information
LM3704
THERMAL METRIC
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
R
θJC(bot)
(1)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
(1)
DGS (VSSOP)
10 PINS
163.7
58.3
83.5
6
82.2
—
UNIT
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
For more information about traditional and new thermal metrics, see the
Semiconductor and IC Package Thermal Metrics
application
report,
SPRA953.
4
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Copyright © 2004–2016, Texas Instruments Incorporated
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www.ti.com
SNVS088F – MAY 2004 – REVISED APRIL 2016
6.5 Electrical Characteristics
at T
J
= 25°C and V
CC
= 2.2 V to 5.5 V (unless otherwise noted)
PARAMETER
POWER SUPPLY
V
CC
I
CC
Operating voltage
V
CC
supply current
LM3704, T
J
= –40°C to 85°C
All inputs = V
CC
,
all outputs floating
T
J
= 25°C
T
J
= –40°C to 85°C
T
J
= 25°C
V
RST
V
RSTH
t
RP
t
RD
RESET
V
CC
> 1.0 V, I
SINK
= 50 µA,
T
J
= –40°C to 85°C
V
CC
> 1.2 V, I
SINK
= 100 µA,
T
J
= –40°C to 85°C
V
OL
RESET
V
CC
> 2.25 V, I
SINK
= 900 µA,
T
J
= –40°C to 85°C
V
CC
> 2.7 V, I
SINK
= 1.2 mA,
T
J
= –40°C to 85°C
V
CC
> 4.5 V, I
SINK
= 3.2 mA,
T
J
= –40°C to 85°C
V
CC
> 2.25 V, I
SOURCE
= 300 µA,
T
J
= –40°C to 85°C
V
OH
RESET
V
CC
> 2.7 V, I
SOURCE
= 500 µA,
T
J
= –40°C to 85°C
V
CC
> 4.5 V, I
SOURCE
= 800 µA,
T
J
= –40°C to 85°C
PFI/MR
V
PFT
V
MRT
V
PFTH
/
V
MRTH
I
PFI
R
MR
t
MD
t
MR
PFI input threshold
MR Input threshold
PFI/MR threshold
hysteresis
Input current (PFI only)
MR pullup resistance
MR to reset delay
MR pulse width
T
J
= –40°C to 85°C
V
CC
> 2.25 V, I
SINK
= 900 µA,
T
J
= –40°C to 85°C
V
OL
PFO, LLO output low
voltage
V
CC
> 2.7 V, I
SINK
= 1.2 mA,
T
J
= –40°C to 85°C
V
CC
> 4.5 V, I
SINK
= 3.2 mA,
T
J
= –40°C to 85°C
25
T
J
= 25°C
T
J
= –40°C to 85°C
T
J
= –40°C to 85°C
MR, low
MR, high
2
0.0032 × V
RST
–75
56
35
12
75
75
1.2
1.225
1.25
0.8
V
V
mV
nA
kΩ
µS
µS
0.8 × V
CC
0.8 × V
CC
V
CC
−
1.5
V
0.3
0.3
0.3
0.3
0.4
V
Reset threshold
Reset threshold hysteresis
Reset time-out period
V
CC
to reset delay
Reset time-out period =
C
V
CC
falling at 1 mV/µs
T
J
= 25°C
T
J
= –40°C to 85°C
140
20
V
CC
falling
T
J
= –40°C to 85°C
T
J
= 0°C to 70°C
–0.5%
–2%
–1.5%
0.0032 × V
RST
200
280
V
RST
1
28
50
0.5%
2%
1.5%
mV
ms
µs
5.5
V
µA
TEST CONDITIONS
MIN
TYP
MAX UNIT
RESET THRESHOLD
PFI/MR falling, V
CC
= V
RST MAX
to 5.5 V
T
J
= –40°C to 85°C
T
J
= 25°C
T
J
= –40°C to 85°C
PFO, LLO
0.3
0.3
0.4
V
Copyright © 2004–2016, Texas Instruments Incorporated
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