Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
LM53602-Q1, LM53603-Q1
SNVSA42B – JUNE 2015 – REVISED MAY 2016
LM53603-Q1 (3 A), LM53602-Q1 (2 A) 3.5 V to 36 V Wide-V
IN
Synchronous 2.1 MHz Step-
Down Converters for Automotive Applications
1 Features
1
2 Applications
•
•
•
Navigation/GPS
Instrument Cluster
ADAS, Infotainment, HUD
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
The LM53603-Q1, LM53602-Q1 are available as
AEC-Q1-Qualified Automotive Grade Products
With Following Results:
– Device Temperature Grade 1: -40°C to +125°C
Ambient Operating Range
– Device HBM ESD Classification Level 1C
– Device CDM ESD Classification Level C4B
3 A or 2 A maximum load current
Input Voltage Range from 3.5 V to 36 V:
Transients to 42 V
Output Voltage Options: 5 V, 3.3 V, ADJ
2.1 MHz Fixed Switching Frequency
±2% Output Voltage Tolerance
–40°C to 150°C Junction Temperature Range
1.7 µA Shutdown Current (typical)
24 µA Input Supply Current at No Load (typical)
No external Feed-back Divider Required for 5 V or
3.3 V output
Reset Output With Filter and Delay
Automatic Light Load Mode for Improved
Efficiency
User-Selectable Forced PWM mode (FPWM)
Built-in Loop Compensation, Soft-start, Current
Limit, Thermal Shutdown, UVLO, and External
Frequency Synchronization
Thermally Enhanced 16-lead Package:
5 mm x 4.4 mm x 1 mm
3 Description
The LM53603-Q1, LM53602-Q1 buck regulators are
specifically designed for automotive applications,
providing an output voltage of 5 V or 3.3 V (with ADJ
option) at 3 A or 2 A, from an input voltage of up to
36 V. Advanced high-speed circuitry allows the
device to regulate from an input of up to 20 V, while
providing an output of 5 V at a switching frequency of
2.1 MHz. The innovative architecture allows the
device to regulate a 3.3 V output from an input
voltage of only 3.5 V. All aspects of this product are
optimized for the automotive customer. An input
voltage range up to 36 V, with transient tolerance up
to 42 V, eases input surge protection design. An open
drain reset output, with filtering and delay, provides a
true indication of system status. This feature negates
the requirement for an additional supervisory
component, saving cost and board space. Seamless
transition between PWM and PFM modes, along with
a no-load operating current of only 24 µA, ensures
high efficiency and superior transient response at all
loads.
Device Information
(1)
PART NUMBER
LM53603-Q1
LM53602-Q1
PACKAGE
HTSSOP (16)
BODY SIZE (NOM)
5.00 mm x 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
V
IN
C
IN
VIN
EN
RESET
VCC
C
VCC
FPWM
SYNC
AGND
PGND
FB
BIAS
C
BIAS
CBOOT
R
bias
LM53603
L
SW
C
BOOT
C
OUT
Automotive Power Supply with 5 V, 3 A Output
V
OUT
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM53602-Q1, LM53603-Q1
SNVSA42B – JUNE 2015 – REVISED MAY 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features
..................................................................
Applications
...........................................................
Description
.............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions
.........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
System Characteristics .............................................
Timing Requirements ................................................
Typical Characteristics ..............................................
1
1
1
2
3
3
4
4
4
5
5
6
7
8
9
8.4 Device Functional Modes........................................
15
9
Application and Implementation
........................
18
9.1 Application Information............................................
18
9.2 Typical Applications ................................................
18
9.3 Do's and Don't's ......................................................
28
10 Power Supply Recommendations
.....................
29
11 Layout...................................................................
30
11.1 Layout Guidelines .................................................
30
11.2 Layout Example ....................................................
32
12 Device and Documentation Support
.................
33
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Device Support ....................................................
Documentation Support ........................................
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
33
33
33
33
34
34
34
8
Detailed Description
............................................
10
8.1 Overview ................................................................
10
8.2 Functional Block Diagram .......................................
10
8.3 Feature Description.................................................
11
13 Mechanical, Packaging, and Orderable
Information
...........................................................
34
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (June 2015) to Revision B
•
•
•
•
•
•
•
•
Page
Added Automotive Features ..................................................................................................................................................
1
changed representation of RESET threshold for clarity (physical parameter unchanged) ....................................................
6
added CFF recommendation table for ADJ version ............................................................................................................
20
Corrected saturation current for some of the recommended inductors in the table "Recommended Inductors" ................
22
Added recommendation for CVCC: use of X7R component is highly recommended .........................................................
22
Added Cboot recommended rating of 10V in the CBOOT section ......................................................................................
22
added power dissipation curve for 5Vout and 3.3Vout ........................................................................................................
23
added layout recommendation for CVCC and CBIAS .........................................................................................................
30
Changes from Original (June 2015) to Revision A
•
•
Page
Changed - Thermal Information, Board drawing on Page 1, Power Dissipation curves, RESET thresholds, maximum
recommended distances for VCC and Bias capacitors and added in a table for Cff. ...........................................................
1
Changed product preview to full data sheet ..........................................................................................................................
1
2
Submit Documentation Feedback
Copyright © 2015–2016, Texas Instruments Incorporated
Product Folder Links:
LM53602-Q1 LM53603-Q1
LM53602-Q1, LM53603-Q1
www.ti.com
SNVSA42B – JUNE 2015 – REVISED MAY 2016
5 Device Comparison Table
PART NUMBER
LM53603-Q1
LM53602-Q1
PACKAGE
HTSSOP (16)
HTSSOP (16)
MAXIMUM OUTPUT CURRENT
3A
2A
6 Pin Configuration and Functions
PWP Package
16-Lead HTSSOP
Top View
SW
SW
CBOOT
VCC
BIAS
SYNC
FPWM
RESET
1
2
3
4
5
6
7
8
EP
(17)
16
15
14
13
12
11
10
9
PGND
PGND
N/C
VIN
VIN
EN
AGND
FB
Pin Functions
PIN
NAME
SW
CBOOT
VCC
BIAS
SYNC
FPWM
RESET
FB
AGND
EN
VIN
N/C
PGND
EP
(1)
NO.
1,2
3
4
5
6
7
8
9
10
11
12, 13
14
15, 16
17
I/O
(1)
P
P
O
P
I
I
O
I
G
I
P
-
G
G
DESCRIPTION
Regulator switch node. Connect to power inductor. Connect pins 1 and 2 directly together at the PCB.
Bootstrap supply input for gate drivers. Connect a high quality 470 nF capacitor from this pin to SW.
Internal 3.15 V regulator output. Used as supply to internal control circuits. Do not connect to any
external loads. Can be used as logic supply for control inputs. Connect a high quality 3.3 µF capacitor
from this pin to GND.
Input to internal voltage regulator. Connect to output voltage point. Do not ground. Connect a high
quality 0.1 µF capacitor from this pin to GND.
Synchronization input to regulator. Used to synchronize the regulator switching frequency to the system
clock. When not used connect to GND; do not float.
Mode control input to regulator. High = forced PWM (FPWM). Low = auto mode; automatic transition
between PFM and PWM. Do not float.
Open drain reset output. Connect to suitable voltage supply through a current limiting resistor. High =
power OK. Low = fault. RESET will go low when EN = low.
Feedback input to regulator. Connect to output voltage sense point for fixed 5 V and 3.3 V output.
Connect to feedback divider tap point for ADJ option. Do not float or ground.
Analog ground for regulator and system. All electrical parameters are measured with respect to this pin.
Connect to EP and PGND on PCB.
Enable input to the regulator. High = ON. Low = OFF. Can be connected directly to VIN. Do not float.
Input supply to the regulator. Connect a high quality bypass capacitor(s) from this pin to PGND.
Connect pins 12 and 13 directly together at the PCB.
This pin has no connection to the device.
Power ground to internal low side MOSFET. Connect to AGND and system ground. Connect pins 15
and 16 directly together at the PCB.
Exposed die attach paddle. Connect to ground plane for adequate heat sinking and noise reduction.
O = Output, I = Input, G = Ground, P = Power
Copyright © 2015–2016, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links:
LM53602-Q1 LM53603-Q1
LM53602-Q1, LM53603-Q1
SNVSA42B – JUNE 2015 – REVISED MAY 2016
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
over the recommended operating junction temperature range of –40°C to 150°C (unless otherwise noted)
(1)
PARAMETER
VIN to AGND, PGND
(2)
SW to AGND, PGND
CBOOT to SW
EN to AGND, PGND
(2)
(3)
MIN
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.1
–0.3
–40
MAX
40
V
IN
+ 0.3
3.6
40
16
16
5.5
8
5.5
4.2
1.2
0.3
150
UNIT
V
V
V
V
V
V
V
V
V
V
mA
V
°C
BIAS to AGND, PGND
FB to AGND, PGND : fixed 5 V and 3.3 V
FB to AGND, PGND : ADJ
RESET to AGND, PGND
SYNC, FPWM, to AGND, PGND
VCC to AGND, PGND
RESET Pin Current
(4)
AGND to PGND
(5)
Storage temperature, T
stg
(1)
(2)
(3)
(4)
(5)
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended
Operating Conditions.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Values given
are D.C.
A maximum of 42 V can be sustained at this pin for a duration of
≤
500 ms at a duty cycle of
≤
0.01%.
Transients on this pin, not exceeding –3 V or +40 V, can be tolerated for a duration of
≤
100 ns. For transients between 40 V and 42 V,
see note
(2)
.
Positive current flows into this pin.
A transient voltage of ±2 V can be sustained for
≤1
µs.
7.2 ESD Ratings
VALUE
VIN, SW, CBOOT
Human-body model (HBM), per AEC Q100-002
V
(ESD)
Electrostatic discharge
(1)
UNIT
±1500
±2500
V
±750
±500
EN, BIAS, RESET, FB,
SYNC, PWM, VCC
CBOOT, VCC, BIAS, SYNC,
Charged-device model (CDM), per AEC Q100-011 FPWM, EN, VIN
SW, RESET, FB, PGND
(1)
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
4
Submit Documentation Feedback
Copyright © 2015–2016, Texas Instruments Incorporated
Product Folder Links:
LM53602-Q1 LM53603-Q1
LM53602-Q1, LM53603-Q1
www.ti.com
SNVSA42B – JUNE 2015 – REVISED MAY 2016
7.3 Recommended Operating Conditions
over the recommended operating junction temperature range of –40°C to 150°C (unless otherwise noted)
(1)
MIN
Input voltage
(2)
(3)
NOM
5
3.3
MAX
36
UNIT
V
V
V
3.9
0
0
(3) (4)
Output voltage : Fixed 5 V
Output voltage : Fixed 3.3 V
(3)
Output voltage adjustment range: ADJ
Output current for LM53603-Q1
Output current for LM53602-Q1
RESET pin current
Operating junction temperature
(5)
(1)
(2)
(3)
(4)
(5)
3.3
0
0
0
–40
6
3
2
1
150
V
A
A
mA
°C
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended
Operating Conditions.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
See
System Characteristics
for details of input voltage range.
Under no conditions should the output voltage be allowed to fall below zero volts.
The maximum recommended output voltage is 6 V. An extended output voltage range to 10 V is possible with changes to the typical
application schematic. Also, some system specifications will not be achieved for output voltages greater than 6 V. Consult the factory for
further information.
High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.
7.4 Thermal Information
THERMAL METRIC
(1)
LM53603-Q1,
LM63602-Q1
PWP (HTSSOP)
16 PINS
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
R
θJC(bot)
(1)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
42.5
22.6
16.2
0.6
16.0
1.1
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
UNIT
The values given in this table are only valid for comparison with other packages and cannot be used for design purposes. These values
were calculated in accordance with JESD 51-7, and simulated on a 4-layer JEDEC board. They do not represent the performance
obtained in an actual application. For design information please see the
Maximum Ambient Temperature
section. For more information
about traditional and new thermal metrics, see the
"Semiconductor and IC Package Thermal Metrics
application report,
SPRA953,
and
the
Using New Thermal Metrics
applications report,
SB VA025.
Copyright © 2015–2016, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Links:
LM53602-Q1 LM53603-Q1
京公网安备 11010802033920号
EEWORLD
