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X1G004171011101

Description
CMOS Output Clock Oscillator,
CategoryPassive components    oscillator   
File Size236KB,5 Pages
ManufacturerSeiko Epson Corporation
Download Datasheet Parametric View All

X1G004171011101 Overview

CMOS Output Clock Oscillator,

X1G004171011101 Parametric

Parameter NameAttribute value
Reach Compliance Codeunknown
Is SamacsysN
Other featuresSTANDBY; ENABLE/DISABLE FUNCTION; TAPE
maximum descent time3.5 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
Installation featuresSURFACE MOUNT
Nominal operating frequency16.65 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS
Output load15 pF
physical size2.5mm x 2.0mm x 0.8mm
longest rise time3.5 ns
Maximum supply voltage3.6 V
Minimum supply voltage1.6 V
surface mountYES
maximum symmetry55/45 %
Base Number Matches1
Clock OSC
SG-210STF
SG-210STF 16.650000 MHz L
Product name
Product Number / Ordering code
X1G0041710111xx
Please refer to the 8.Packing information about xx (last 2 digits)
Output waveform CMOS
Pb free / Complies with EU RoHS directive
Reference weight Typ. 12 mg
1.Absolute maximum ratings
Parameter
Symbol
Maximum supply voltage
Storage temperature
Input voltage
Min.
-0.3
-40
-0.3
Typ.
-
-
-
Max.
+4
+125
Vcc+0.3
Unit
V
ºC
V
Conditions / Remarks
-
Storage as single product
ST terminal
Vcc-GND
T_stg
Vin
2.Specifications(characteristics)
Parameter
Symbol
Output frequency
Supply voltage
Operating temperature
Frequency tolerance
Current consumption
Stand-by current
Symmetry
Output voltage
Output load condition
Input voltage
Min.
1.6
-40
-50
-
-
45
Vcc-0.4
-
-
0.8Vcc
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-3
-
Typ.
16.650000
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
2.4
2.3
20
2.5
0.59
-
-97
-125
-146
-155
-158
-159
-
-
Max.
3.6
+85
50
1.8
2.7
55
-
0.4
15
-
0.2Vcc
3.5
3.5
3
-
-
-
-
-
-
-
-
-
-
-
-
-
3
-
Unit
MHz
V
ºC
x10
-6
mA
µA
%
Conditions / Remarks
-
-
T_use
No load condition Vcc = 3.6V
Vcc = 3.6V , ST = GND
50% Vcc Level L_CMOS=<15pF
-
-
f0
Vcc
T_use
f_tol
Icc
I_std
SYM
V
OH
V
OL
L_CMOS
V
IH
V
IL
t
r
tf
t_str
t
DJ
t
RJ
t
RMS
t
p-p
t
acc
pF
CMOS Load
ST terminal
ST terminal
Vcc1.8V±10% : 0.2Vcc to 0.8Vcc Level,
L_CMOS=15pF
Vcc1.8V±10% : 0.2Vcc to 0.8Vcc Level,
L_CMOS=15pF
t = 0 at 0.9Vcc
Deterministic Jitter Vcc=3.3V
Random Jitter Vcc=3.3V
δ(RMS of total distribution) Vcc=3.3V
Peak to Peak Vcc=3.3V
Accumulated Jitter(δ) n=2 to 50000
cycles
Off set Frequency: 12kHz to 20MHz, Vcc=3.3V
Rise time
Fall time
Start-up time
Jitter
ns
ns
ms
ps
ps
ps
ps
ps
ps
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
x10
-6
Phase jitter
Phase noise
t
PJ
L(f)
-
Off set 10Hz Vcc=3.3V
Off set 100Hz Vcc=3.3V
Off set 1kHz Vcc=3.3V
Off set 10kHz Vcc=3.3V
Off set 100kHz Vcc=3.3V
Off set 1MHz Vcc=3.3V
@+25ºC first year
-
Frequency aging
f_age
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