IS66WVE51216TBLL-55BI datasheet, PDF

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IS66WVE51216TBLL-55BI: DescriptionPseudo Static RAM, 512KX16, 55ns, CMOS, PBGA48, 6 X 8 MM, MO-207, TFBGA-48; Categorystorage storage; File Size645KB，33 Pages; ManufacturerISSI(Integrated Silicon Solution Inc.); Websitehttp://www.issi.com/

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IS66WVE51216TBLL-55BI Overview

Pseudo Static RAM, 512KX16, 55ns, CMOS, PBGA48, 6 X 8 MM, MO-207, TFBGA-48

IS66WVE51216TBLL-55BI Parametric

Parameter Name	Attribute value
package instruction	6 X 8 MM, MO-207, TFBGA-48
Reach Compliance Code	unknown
Is Samacsys	N
Maximum access time	55 ns
JESD-30 code	R-PBGA-B48
length	8 mm
memory density	8388608 bit
Memory IC Type	PSEUDO STATIC RAM
memory width	16
Number of functions	1
Number of terminals	48
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	512KX16
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.75 mm
Terminal location	BOTTOM
width	6 mm
Base Number Matches	1

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IS66/IS67WVE51216EALL/EBLL/ECLL

IS67/IS67WVE51216TALL/TBLL/TCLL

8Mb Async/Page PSRAM

NOVEMBER 2015

Overview

The IS66/67WVE51216EALL/BLL/CLL and IS66/67WVE51216TALL/BLL/CLL are integrated memory device

containing 8Mbit Pseudo Static Random Access Memory using a self-refresh DRAM array organized as

512K words by 16 bits. The device includes several power saving modes : Partial Array Refresh mode

where data is retained in a portion of the array and Deep Power Down mode. Both these modes reduce

standby current drain. The die has separate power rails, VDDQ and VSSQ for the I/O to be run from a

separate power supply from the device core.

Features



Asynchronous and page mode interface



Dual voltage rails for optional performance



ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V



BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V



CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V



Page mode read access



Interpage Read access : 60ns, 70ns



Intrapage Read access : 25ns



Low Power Consumption



Asynchronous Operation < 30 mA



Intrapage Read < 23 mA



Standby < 150 uA (max.)



Deep power-down (DPD)



ALL/CLL: < 3µA (Typ)



BLL: < 10µA (Typ)



Low Power Feature



Temperature Controlled Refresh



Partial Array Refresh



Deep power-down (DPD) mode



Operating temperature Range

Industrial: -40°C~85°C

Automotive A1: -40°C~85°C



Package:

48-ball TFBGA

products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services

described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information

and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or

malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or

effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to

its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Rev. C | Oct. 2015

www.issi.com

- SRAM@issi.com

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