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MC74VHC125DG

Description
Quad Bus Buffer, 3-State, SOIC-14 NB, 55-TUBE
Categorylogic    logic   
File Size88KB,8 Pages
ManufacturerCinetech Industrial Co., Ltd.
Environmental Compliance
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MC74VHC125DG Overview

Quad Bus Buffer, 3-State, SOIC-14 NB, 55-TUBE

MC74VHC125DG Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instructionSOP, SOP14,.25
Contacts14
Manufacturer packaging code751A-03
Reach Compliance Codecompliant
Is SamacsysN
Control typeENABLE LOW
seriesAHC/VHC
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length8.65 mm
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.008 A
Humidity sensitivity level1
Number of digits1
Number of functions4
Number of ports2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingRAIL
Peak Reflow Temperature (Celsius)260
power supply2/5.5 V
Prop。Delay @ Nom-Sup10.5 ns
propagation delay (tpd)16 ns
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width3.9 mm
Base Number Matches1
MC74VHC125
Quad Bus Buffer
with 3−State Control Inputs
The MC74VHC125 is a high speed CMOS quad bus buffer
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The MC74VHC125 requires the 3−state control input (OE) to be set
High to place the output into the high impedance state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V
systems to 3 V systems.
Features
www.onsemi.com
14−LEAD SOIC
D SUFFIX
CASE 751A
14−LEAD TSSOP
DT SUFFIX
CASE 948G
High Speed: t
PD
= 3.8ns (Typ) at V
CC
= 5 V
Low Power Dissipation: I
CC
= 4
mA
(Max) at T
A
= 25°C
High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2 V to 5.5 V Operating Range
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: Human Body Model; > 2000 V,
Machine Model; > 200 V
Chip Complexity: 72 FETs or 18 Equivalent Gates
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
LOGIC DIAGRAM
Active−Low Output Enables
A1
OE1
A2
OE2
A3
OE3
A4
OE4
2
1
5
4
9
10
12
13
11
8
Y3
6
3
Y1
PIN CONNECTION AND
MARKING DIAGRAM
(Top View)
OE1
A1
Y1
OE2
A2
Y2
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
OE4
A4
Y4
OE3
A3
Y3
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 6 of this data sheet.
FUNCTION TABLE
VHC125
Inputs
A
H
L
X
OE
L
L
H
Output
Y
H
L
Z
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Y2
Y4
©
Semiconductor Components Industries, LLC, 2014
1
October, 2017 − Rev. 8
Publication Order Number:
MC74VHC125/D
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