PALCE29MA16H-35DC datasheet, PDF

PALCE29MA16H-35DC: DescriptionEE PLD, 36ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SKINNY, CERAMIC, DIP-24; CategoryProgrammable logic devices Programmable logic; File Size701KB，22 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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PALCE29MA16H-35DC Overview

EE PLD, 36ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SKINNY, CERAMIC, DIP-24

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	AMD
Parts packaging code	DIP
package instruction	DIP, DIP24,.3
Contacts	24
Reach Compliance Code	unknown
Is Samacsys	N
Architecture	PAL-TYPE
maximum clock frequency	25 MHz
JESD-30 code	R-GDIP-T24
JESD-609 code	e0
Dedicated input times	4
Number of I/O lines	16
Number of entries	21
Output times	16
Number of product terms	178
Number of terminals	24
Maximum operating temperature	75 °C
Minimum operating temperature
organize	4 DEDICATED INPUTS, 16 I/O
Output function	MACROCELL
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	EE PLD
propagation delay	36 ns
Certification status	Not Qualified
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

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