IDT74LVCH162721APA8 datasheet, PDF

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IDT74LVCH162721APA8: DescriptionBus Driver, LVC/LCX/Z Series, 1-Func, 20-Bit, True Output, CMOS, PDSO56, TSSOP-56; Categorylogic logic; File Size115KB，6 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT74LVCH162721APA8 Overview

Bus Driver, LVC/LCX/Z Series, 1-Func, 20-Bit, True Output, CMOS, PDSO56, TSSOP-56

IDT74LVCH162721APA8 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	TSSOP
package instruction	TSSOP,
Contacts	56
Reach Compliance Code	compliant
Other features	WITH CLOCK ENABLE
series	LVC/LCX/Z
JESD-30 code	R-PDSO-G56
length	14 mm
Logic integrated circuit type	BUS DRIVER
Number of digits	20
Number of functions	1
Number of ports	2
Number of terminals	56
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE WITH SERIES RESISTOR
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
propagation delay (tpd)	6.6 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6.1 mm

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IDT74LVCH162721A

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

EXTENDED COMMERCIAL TEMPERATURE RANGE

IDT74LVCH162721A

3.3V CMOS 20-BIT

FLIP-FLOP WITH 3-STATE

OUTPUTS, 5 VOLT TOLERANT I/O

AND BUS-HOLD

FEATURES:

–

Typical

SK(0)

(Output Skew) < 250ps

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

0.635mm pitch SSOP, 0.50mm pitch TSSOP

and 0.40mm pitch TVSOP packages

Extended commercial range of -40°C to +85°C

= 3.3V ±0.3V, Normal Range

= 2.7V to 3.6V, Extended Range

CMOS power levels (0.4µ W typ. static)

All inputs, outputs and I/O are 5 Volt tolerant

Supports hot insertion

DESCRIPTION:

This 20-bit flip-flop is built using advanced dual metal CMOS technology.

The 20 flip-flops of the LVCH162721A are edge-triggered D-type flip-flops

with qualified clock storage. On the positive transition of the clock (CLK)

input, the device provides true data at the Q outputs if the clock-enable

(CLKEN) input is low. If

CLKEN

is high, no data is stored.

A buffered output-enable (OE) input places the 20 outputs in either a

normal logic state (high or low) or a high-impedance state. In the high-

impedance state, the outputs neither load nor drive the bus lines significantly.

The high-impedance state and increased drive provide the capability to

drive bus lines without the need for interface or pullup components.

does

not affect the internal operation of the flip-flops. Old data can be retained or

new data can be entered while the outputs are in the high-impedance state.

The LVCH162721A has series resistors in the device output structure

which will significantly reduce line noise when used with light loads. This

driver has been designed to drive ±12mA at the designated threshold

levels.

The LVCH162721A has “bus-hold” which retains the inputs’ last state

whenever the input goes to a high impedance. This prevents floating inputs

and eliminates the need for pull-up/down resistors.

Drive Features for LVCH162721A:

– Balanced Output Drivers:

±12mA

– Low switching noise

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

FUNCTIONAL BLOCK DIAGRAM

CLK

CLKEN

To 19 Other Channels

EXTENDED COMMERCIAL TEMPERATURE RANGE

1999 Integrated Device Technology, Inc.

OCTOBER 1999

DSC-4940/-

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