3D7521G datasheet, PDF - EEWORLD Datasheet

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3D7521G: DescriptionManchester Encoder, CMOS, PDSO14, 0.300 INCH, ROHS COMPLIANT, GULLWING, DIP-14; CategoryWireless rf/communication Telecom circuit; File Size123KB，4 Pages; ManufacturerData Delay Devices; Environmental Compliance

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3D7521G Overview

Manchester Encoder, CMOS, PDSO14, 0.300 INCH, ROHS COMPLIANT, GULLWING, DIP-14

3D7521G Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	SOIC
package instruction	SOP,
Contacts	14
Reach Compliance Code	compliant
JESD-30 code	R-PDSO-G14
length	19.305 mm
Number of functions	1
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	4.57 mm
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	MANCHESTER ENCODER
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

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3D7521

MONOLITHIC MANCHESTER

ENCODER

(SERIES 3D7521)

FEATURES

All-silicon, low-power CMOS

technology

TTL/CMOS compatible inputs and

outputs

Vapor phase, IR and wave

solderable

Auto-insertable (DIP pkg.)

Low ground bounce noise

Maximum data rate:

50 MBaud

data

delay

devices,

inc.

PACKAGES

CLK

N/C

“

VDD

N/C

TXB

CLK

RESB

DAT

GND

3D7521M

3D7521H

3D7521Z

VDD

N/C

TXB

RESB

DAT

N/C

GND

DIP (.300)

Gull Wing (.300)

SOIC (.150)

3D7521 DIP (.300)

3D7521G Gull Wing (.300)

3D7521D SOIC (.150)

For mechanical dimensions, click

here

For package marking details, click

here

FUNCTIONAL DESCRIPTION

The 3D7521 is a monolithic CMOS Manchester Encoder. The clock

and data, present at the unit input, are combined into a single bi-phase-

level signal. In this encoding mode, a logic one is represented by a

high-to-low transition within the bit cell, while a logic zero is represented

by a low-to-high transition. The unit operating baud rate (in Mbaud) is

equal to the input clock frequency (in MHZ). All pins marked N/C must

be left unconnected.

PIN DESCRIPTIONS

DAT

CLK

RESB

TXB

VDD

GND

Data Input

Clock Input

Reset

Signal Output

Inverted Signal Output

+5 Volts

Ground

The all-CMOS 3D7521 integrated circuit has been designed as a reliable, economic alternative to hybrid

TTL Manchester Encoder. It is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads. It is

offered in standard 8-pin and 14-pin auto-insertable DIPs and space saving surface mount 8-pin and 14-pin

SOICs.

Doc #06001

5/8/2006

DATA DELAY DEVICES, INC.

3 Mt. Prospect Ave. Clifton, NJ 07013

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