C8051F85x/86x
Low-Cost 8-bit MCU Family with up to 8 kB of Flash
Memory
-
Up to 8 kB flash
-
Flash is in-system programmable in 512-Byte sectors
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Up to 512 Bytes RAM (256 + 256)
On-Chip Debug
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On-chip debug circuitry facilitates full speed, non-intrusive in-
-
system debug (no emulator required)
Provides breakpoints, single stepping, inspect/modify memory
and registers
High-Speed CIP-51 µC Core
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Efficient, pipelined instruction architecture
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Up to 25 MIPS throughput with 25 MHz clock
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Uses standard 8051 instruction set
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Expanded interrupt handler
Communication Peripherals
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UART
-
I
2
C / SMBus™
-
SPI™
Timer/Counters and PWM
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4 General-Purpose 16-bit Timer/Counters
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16-bit Programmable Counter Array (PCA) with three channels
of PWM, capture/compare, or frequency output capability, and
hardware kill/safe state capability
12-Bit Analog-to-Digital Converter
-
Up to 16 input channels
-
Up to 200 ksps 12-bit mode or 800 ksps 10-bit mode
-
Internal VREF or external VREF supported
Internal Low-Power Oscillator
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Calibrated to 24.5 MHz
-
Low supply current
-
±2% accuracy over supply and temperature
Internal Low-Frequency Oscillator
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80 kHz nominal operation
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Low supply current
-
Independent clock source for watchdog timer
2 Analog Comparators
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Programmable hysteresis and response time
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Configurable as interrupt or reset source
-
Low current
General-Purpose I/O
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Up to 18 pins
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5 V-Tolerant
-
Crossbar-enabled
Additional Support Peripherals
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Independent watchdog timer clocked from LFO
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16-bit CRC engine
Unique Identifier
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32-bit unique key for each device
Supply Voltage
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2.2 to 3.6 V
Package Options
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16-pin SOIC
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20-pin QFN, 3 x 3 mm
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24-pin QSOP
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Available in die form
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Qualified to AEC-Q100 Standards
Temperature Ranges:
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–40 to +125 °C (-Ix) and –40 to +85 °C (-Gx)
Core / Memory / Support
2-8 kB Flash
256-512 B RAM
Watchdog
Core LDO
Supply Monitor
16-bit CRC
Digital Peripherals
18 Multi-Function 5V-Tolerant I/O Pins
UART
I2C / SMBus
SPI
4 x 16-bit Timers
3-Channel PCA
Priority Crossbar
Encoder
Flexible Pin Muxing
CIP-51
(25 MHz)
C2 Serial Debug / Programming
24.5 MHz Low Power Oscillator
80 kHz Low Frequency Oscillator
External Clock (CMOS Input)
Clock Selection
Clocking / Oscillators
Analog Peripherals
SAR ADC
(12-bit 200 ksps,10-bit 800 ksps)
Voltage Reference
2 x Low Current Comparators
Rev. 1.0 2/14
Copyright © 2014 by Silicon Laboratories
C8051F85x/86x
C8051F85x-86x
Table of Contents
1. Electrical Specifications............................................................................................ 8
1.1. Electrical Characteristics ..................................................................................... 8
1.2. Typical Performance Curves ............................................................................. 19
1.2.1. Operating Supply Current ......................................................................... 19
1.2.2. ADC Supply Current.................................................................................. 20
1.2.3. Port I/O Output Drive................................................................................. 21
1.3. Thermal Conditions ........................................................................................... 21
1.4. Absolute Maximum Ratings............................................................................... 22
2. System Overview ..................................................................................................... 23
2.1. Power ............................................................................................................ 25
2.1.1. LDO ....................................................................................................... 25
2.1.2. Voltage Supply Monitor (VMON0)............................................................. 25
2.1.3. Device Power Modes ................................................................................ 25
2.2. I/O
............................................................................................................ 26
2.2.1. General Features ...................................................................................... 26
2.2.2. Crossbar.................................................................................................... 26
2.3. Clocking ............................................................................................................ 27
2.4. Counters/Timers and PWM ............................................................................... 27
2.4.1. Programmable Counter Array (PCA0) ...................................................... 27
2.4.2. Timers (Timer 0, Timer 1, Timer 2 and Timer 3) ....................................... 27
2.4.3. Watchdog Timer (WDT0) .......................................................................... 27
2.5. Communications and other Digital Peripherals ................................................. 28
2.5.1. Universal Asynchronous Receiver/Transmitter (UART0).......................... 28
2.5.2. Serial Peripheral Interface (SPI0) ............................................................. 28
2.5.3. System Management Bus / I2C (SMBus0) ............................................... 28
2.5.4. 16/32-bit CRC (CRC0) .............................................................................. 28
2.6. Analog Peripherals ............................................................................................ 30
2.6.1. 12-Bit Analog-to-Digital Converter (ADC0) ............................................... 30
2.6.2. Low Current Comparators (CMP0, CMP1) ............................................... 30
2.7. Reset Sources ................................................................................................... 31
2.8. On-Chip Debugging........................................................................................... 31
3. Pin Definitions.......................................................................................................... 32
3.1. C8051F850/1/2/3/4/5 QSOP24 Pin Definitions ................................................. 32
3.2. C8051F850/1/2/3/4/5 QFN20 Pin Definitions .................................................... 36
3.3. C8051F860/1/2/3/4/5 SOIC16 Pin Definitions ................................................... 39
4. Ordering Information ............................................................................................... 42
5. QSOP-24 Package Specifications .......................................................................... 45
6. QFN-20 Package Specifications ............................................................................. 47
7. SOIC-16 Package Specifications ............................................................................ 50
8. Memory Organization .............................................................................................. 52
8.1. Program Memory............................................................................................... 53
8.1.1. MOVX Instruction and Program Memory .................................................. 53
8.2. Data Memory ..................................................................................................... 53
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Rev. 1.0
C8051F85x-86x
8.2.1. Internal RAM ............................................................................................. 53
8.2.2. External RAM ............................................................................................ 54
8.2.3. Special Function Registers ....................................................................... 55
9. Special Function Register Memory Map................................................................ 56
10. Flash Memory......................................................................................................... 61
10.1. Security Options .............................................................................................. 61
10.2. Programming the Flash Memory ..................................................................... 63
10.2.1. Flash Lock and Key Functions ................................................................ 63
10.2.2. Flash Erase Procedure ........................................................................... 63
10.2.3. Flash Write Procedure ............................................................................ 63
10.3. Non-Volatile Data Storage............................................................................... 64
10.4. Flash Write and Erase Guidelines ................................................................... 64
10.4.1. Voltage Supply Maintenance and the Supply Monitor ............................ 64
10.4.2. PSWE Maintenance ................................................................................ 65
10.4.3. System Clock .......................................................................................... 65
10.5. Flash Control Registers ................................................................................... 66
11. Device Identification and Unique Identifier ......................................................... 68
11.1. Device Identification Registers ........................................................................ 69
12. Interrupts ................................................................................................................ 72
12.1. MCU Interrupt Sources and Vectors................................................................ 72
12.1.1. Interrupt Priorities.................................................................................... 72
12.1.2. Interrupt Latency ..................................................................................... 72
12.2. Interrupt Control Registers .............................................................................. 75
13. Power Management and Internal Regulator ........................................................ 82
13.1. Power Modes................................................................................................... 82
13.1.1. Idle Mode ................................................................................................ 82
13.1.2. Stop Mode............................................................................................... 83
13.2. LDO Regulator................................................................................................. 83
13.3. Power Control Registers.................................................................................. 83
13.4. LDO Control Registers .................................................................................... 84
14. Analog-to-Digital Converter (ADC0)..................................................................... 85
14.1. ADC0 Analog Multiplexer ................................................................................ 86
14.2. ADC Operation ................................................................................................ 88
14.2.1. Starting a Conversion.............................................................................. 88
14.2.2. Tracking Modes....................................................................................... 88
14.2.3. Burst Mode.............................................................................................. 89
14.2.4. Settling Time Requirements.................................................................... 90
14.2.5. Gain Setting ............................................................................................ 91
14.3. 8-Bit Mode ....................................................................................................... 91
14.4. 12-Bit Mode ..................................................................................................... 91
14.5. Power Considerations ..................................................................................... 92
14.6. Output Code Formatting .................................................................................. 94
14.7. Programmable Window Detector..................................................................... 95
14.7.1. Window Detector In Single-Ended Mode ................................................ 95
14.8. Voltage and Ground Reference Options ......................................................... 97
Rev. 1.0
3
C8051F85x-86x
14.8.1. External Voltage Reference .................................................................... 97
14.8.2. Internal Voltage Reference ..................................................................... 97
14.8.3. Analog Ground Reference ...................................................................... 97
14.9. Temperature Sensor........................................................................................ 98
14.9.1. Calibration ............................................................................................... 98
14.10. ADC Control Registers .................................................................................. 99
15. CIP-51 Microcontroller Core ............................................................................... 113
15.1. Performance .................................................................................................. 113
15.2. Programming and Debugging Support .......................................................... 114
15.3. Instruction Set................................................................................................ 114
15.3.1. Instruction and CPU Timing .................................................................. 114
15.4. CPU Core Registers ...................................................................................... 119
16. Clock Sources and Selection (HFOSC0, LFOSC0, and EXTCLK).................... 125
16.1. Programmable High-Frequency Oscillator .................................................... 125
16.2. Programmable Low-Frequency Oscillator ..................................................... 125
16.2.1. Calibrating the Internal L-F Oscillator.................................................... 125
16.3. External Clock ............................................................................................... 126
16.4. Clock Selection.............................................................................................. 126
16.5. High Frequency Oscillator Control Registers ................................................ 127
16.6. Low Frequency Oscillator Control Registers ................................................. 128
16.7. Clock Selection Control Registers ................................................................. 129
17. Comparators (CMP0 and CMP1)......................................................................... 130
17.1. System Connectivity ...................................................................................... 130
17.2. Functional Description ................................................................................... 133
17.3. Comparator Control Registers....................................................................... 134
18. Cyclic Redundancy Check Unit (CRC0)............................................................. 140
18.1. CRC Algorithm............................................................................................... 140
18.2. Preparing for a CRC Calculation ................................................................... 142
18.3. Performing a CRC Calculation ...................................................................... 142
18.4. Accessing the CRC0 Result .......................................................................... 142
18.5. CRC0 Bit Reverse Feature............................................................................ 142
18.6. CRC Control Registers .................................................................................. 143
19. External Interrupts (INT0 and INT1).................................................................... 149
19.1. External Interrupt Control Registers .............................................................. 150
20. Programmable Counter Array (PCA0)................................................................ 152
20.1. PCA Counter/Timer ....................................................................................... 153
20.2. PCA0 Interrupt Sources................................................................................. 153
20.3. Capture/Compare Modules ........................................................................... 154
20.3.1. Output Polarity ...................................................................................... 154
20.3.2. Edge-Triggered Capture Mode ............................................................. 155
20.3.3. Software Timer (Compare) Mode.......................................................... 156
20.3.4. High-Speed Output Mode ..................................................................... 157
20.3.5. Frequency Output Mode ....................................................................... 158
20.4. PWM Waveform Generation.......................................................................... 159
20.4.1. Edge Aligned PWM ............................................................................... 159
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Rev. 1.0
C8051F85x-86x
20.4.2. Center Aligned PWM............................................................................. 161
20.4.3. 8 to11-bit Pulse Width Modulator Modes ............................................. 163
20.4.4. 16-Bit Pulse Width Modulator Mode..................................................... 164
20.5. Comparator Clear Function ........................................................................... 165
20.6. PCA Control Registers .................................................................................. 167
21. Port I/O (Port 0, Port 1, Port 2, Crossbar, and Port Match) .............................. 184
21.1. General Port I/O Initialization......................................................................... 185
21.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 186
21.2.1. Assigning Port I/O Pins to Analog Functions ........................................ 186
21.2.2. Assigning Port I/O Pins to Digital Functions.......................................... 186
21.2.3. Assigning Port I/O Pins to Fixed Digital Functions................................ 187
21.3. Priority Crossbar Decoder ............................................................................. 188
21.4. Port I/O Modes of Operation.......................................................................... 191
21.4.1. Configuring Port Pins For Analog Modes.............................................. 191
21.4.2. Configuring Port Pins For Digital Modes ............................................... 191
21.4.3. Port Drive Strength................................................................................ 192
21.5. Port Match ..................................................................................................... 192
21.6. Direct Read/Write Access to Port I/O Pins .................................................... 192
21.7. Port I/O and Pin Configuration Control Registers.......................................... 193
22. Reset Sources and Supply Monitor ................................................................... 211
22.1. Power-On Reset ............................................................................................ 212
22.2. Power-Fail Reset / Supply Monitor ................................................................ 213
22.3. Enabling the VDD Monitor ............................................................................. 213
22.4. External Reset ............................................................................................... 214
22.5. Missing Clock Detector Reset ....................................................................... 214
22.6. Comparator0 Reset ....................................................................................... 214
22.7. Watchdog Timer Reset.................................................................................. 214
22.8. Flash Error Reset .......................................................................................... 214
22.9. Software Reset .............................................................................................. 214
22.10. Reset Sources Control Registers ................................................................ 215
22.11. Supply Monitor Control Registers................................................................ 216
23. Serial Peripheral Interface (SPI0) ....................................................................... 217
23.1. Signal Descriptions........................................................................................ 218
23.1.1. Master Out, Slave In (MOSI)................................................................. 218
23.1.2. Master In, Slave Out (MISO)................................................................. 218
23.1.3. Serial Clock (SCK) ................................................................................ 218
23.1.4. Slave Select (NSS) ............................................................................... 218
23.2. SPI0 Master Mode Operation ........................................................................ 219
23.3. SPI0 Slave Mode Operation .......................................................................... 221
23.4. SPI0 Interrupt Sources .................................................................................. 221
23.5. Serial Clock Phase and Polarity .................................................................... 221
23.6. SPI Special Function Registers ..................................................................... 223
23.7. SPI Control Registers .................................................................................... 227
24. System Management Bus / I2C (SMBus0) ......................................................... 233
24.1. Supporting Documents .................................................................................. 234
Rev. 1.0
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Analog electronics
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