REVISIONS
LTR
A
DESCRIPTION
Add vendor CAGE number 75569 to the drawing. Add vendor CAGE number
6Y440 to device types 03LX, 03XX, 04LX, and 04XX. Removed Vendor CAGE
number OBK02 from drawing as approved source of supply. Editorial changes
throughout.
Drawing updated to reflect current requirements. Editorial changes throughout.
- gap
DATE (YR-MO-DA)
89-10-16
APPROVED
M. A. Frye
B
00-10-23
Raymond Monnin
THE FRONT PAGE OF THIS DRAWING HAS BEEN REPLACED
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
REV
SHEET
PREPARED BY
James E. Jamison
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
B
10
B
11
B
12
B
13
B
14
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
CHECKED BY
Charles Reusing
APPROVED BY
Michael A. Frye
MICROCIRCUIT, MEMORY, DIGITAL, CMOS,
256K X 1 SRAM, MONOLITHIC SILICON
DRAWING APPROVAL DATE
88-10-22
AMSC N/A
REVISION LEVEL
B
SIZE
A
SHEET
CAGE CODE
67268
1 OF
14
5962-88725
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E544-00
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-88725
01
L
X
Drawing number
Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
02
03
04
05
Generic number
5C2561
5C2561
5C2561
5C2561
5C2561
Circuit function
256K x 1 CMOS SRAM
256K x 1 CMOS SRAM
256K x 1 CMOS SRAM
256K x 1 CMOS SRAM
256K x 1 CMOS SRAM
Access time
35 ns
45 ns
55 ns
70 ns
25 ns
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
L
X
Y
Descriptive designator
GDIP3-T24 or CDIP4-T24
CQCC3-N28
CDFP4-F28
Terminals
24
28
28
Package style
Dual-in-line package
Rectangular leadless chip carrier
Flat pack
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings.
Voltage on any input relative to V
SS
...............................................
Voltage applied to Q ......................................................................
Storage temperature range ...........................................................
Maximum power dissipation (P
D
) ..................................................
Lead temperature (soldering, 10 seconds) ...................................
Thermal resistance, junction-to-case (
JC
) ....................................
Junction temperature (T
J
) ..............................................................
1.4 Recommended operating conditions.
Supply voltage range (V
CC
) ...........................................................
Supply voltage (V
SS)
......................................................................
Input high voltage range (V
IH
) .......................................................
Input low voltage range (V
IL
) .........................................................
Case operating temperature range (T
C
) .......................................
4.5 V dc to 5.5 V dc
0V
+2.2 V dc to +6.0 V dc
-0.5 V dc to +0.8 V dc 2/
-55
C to +125
C
-0.5 V dc to +7.0 V dc
-0.5 V dc to +6.0 V dc
-65
C to +150
C
1.0 W
+260
C
See MIL-STD-1835
+150
C 1/
1/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in
accordance with method 5004 of MIL-STD-883.
2/ V
IL
minimum = -3.0 V dc for pulse width less than 20 ns.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-88725
SHEET
B
2
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed
in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in
the solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 -
MIL-STD-973 -
MIL-STD-1835 -
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
Test Method Standard Microcircuits.
Configuration Management.
Interface Standard Electronic Component Case Outlines.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-
JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-
PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying
activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan
may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device.
These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-
PRF-38535 is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as
specified in MIL-PRF-38535, appendix A and herein.
3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.2 Truth table. The truth table shall be as specified on figure 2.
3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-88725
SHEET
B
3
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN
listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). For
packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the
option of not marking the "5962-" on the device.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-
38535, appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided
with each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535,
appendix A.
3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's
facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the
reviewer.
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteria shall apply:
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1015 of MIL-STD-883.
(2) T
A
= +125
C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-88725
SHEET
B
4
TABLE I. Electrical performance characteristics.
Conditions
-55
C
T
C
+125
C
V
CC
= 4.5 V to 5.5 V
V
SS
= 0 V
unless otherwise specified
Operating supply current I
CC1
1/
t
AVAV
= t
AVAV
(minimum),
V
CC
= 5.5 V, CE = V
IL
,
All other inputs at V
IL
Standby power supply
current TTL
1/
I
CC2
CE
Test
Symbol
Group A
subgroups
Device
types
Min
Limits
Unit
Max
120
135
mA
1, 2, 3
01-04
05
V
IH
, all other inputs
1, 2, 3
All
25
mA
V
IL
or
V
IH
, V
CC
= 5.5 V,
1, 2, 3
All
20
mA
f = 0 MHz
Standby power supply
current CMOS
1/
I
CC3
CE
(V
CC
-0.2 V), f = 0 MHz,
V
CC
= 5.5 V, all other inputs
< 0.2 V or > (V
CC
-0.2 V)
Input leakage current,
any input
Off-state output leakage
current
Output high voltage
I
ILK
V
CC
= 5.5 V,
V
IN
= 0 V to 5.5 V
1, 2, 3
All
10
A
I
OLK
V
CC
= 5.5 V,
V
IN
= 0 V to 5.5 V
1, 2, 3
All
10
A
V
OH
I
OUT
= -4.0 mA, V
CC
= 4.5 V,
V
IL
= 0.8 V, V
IH
= 2.2 V
1, 2, 3
All
2.4
V
Output low voltage
V
OL
I
OUT
= 8.0 mA, V
CC
= 4.5 V,
V
IL
= 0.8 V, V
IH
= 2.2 V
1, 2, 3
All
0.4
V
Input capacitance
C
IN
V
IN
= 0 V,
f = 1.0 MHz, T
C
= 25
C,
See 4.3.1c
4
All
10.0
pF
Output capacitance
C
OUT
V
OUT
= 0 V,
f = 1.0 MHz, T
C
= 25
C,
See 4.3.1c
4
All
12.0
pF
Chip enable access
time
t
ELQV
See figure 3
2/
9, 10, 11
01
02
03
04
05
35
45
55
70
25
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-88725
SHEET
B
5
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