IDT70V27L25PF datasheet, PDF - EEWORLD Datasheet

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IDT70V27L25PF: DescriptionDual-Port SRAM, 32KX16, 25ns, CMOS, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100; Categorystorage storage; File Size355KB，21 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT70V27L25PF Overview

Dual-Port SRAM, 32KX16, 25ns, CMOS, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100

IDT70V27L25PF Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Parts packaging code	QFP
package instruction	14 X 14 MM, 1.40 MM HEIGHT, TQFP-100
Contacts	100
Reach Compliance Code	_compli
ECCN code	EAR99
Maximum access time	25 ns
Other features	INTERRUPT FLAGS
I/O type	COMMON
JESD-30 code	S-PQFP-G100
JESD-609 code	e0
length	14 mm
memory density	524288 bi
Memory IC Type	DUAL-PORT SRAM
memory width	16
Humidity sensitivity level	3
Number of functions	1
Number of ports	2
Number of terminals	100
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32KX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP100,.63SQ,20
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum standby current	0.003 A
Minimum standby current	3 V
Maximum slew rate	0.21 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	20
width	14 mm
Base Number Matches	1

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HIGH-SPEED 3.3V

32K x 16 DUAL-PORT

STATIC RAM

Features:

◆

IDT70V27S/L

◆

True Dual-Ported memory cells which allow simultaneous

access of the same memory location

High-speed access

– Commercial: 15/20/25/35/55ns (max.)

– Industrial: 20/35ns (max.)

Low-power operation

– IDT70V27S

Active: 500mW (typ.)

Standby: 3.3mW (typ.)

– IDT70V27L

Active: 500mW (typ.)

Standby: 660

W (typ.)

Separate upper-byte and lower-byte control for bus

matching capability

Dual chip enables allow for depth expansion without

external logic

◆

IDT70V27 easily expands data bus width to 32 bits or more

using the Master/Slave select when cascading more than

one device

M/S = V

for

BUSY

output flag on Master,

M/S = V

for

BUSY

input on Slave

Busy and Interrupt Flags

On-chip port arbitration logic

Full on-chip hardware support of semaphore signaling

between ports

Fully asynchronous operation from either port

LVTTL-compatible, single 3.3V (±0.3V) power supply

Available in 100-pin Thin Quad Flatpack (TQFP), and 144-

pin Fine Pitch BGA (fpBGA)

Industrial temperature range (-40°C to +85°C) is available

for selected speeds

Green parts available, see ordering information

Functional Block Diagram

R/W

I/O

8-15L

I/O

0-7L

BUSY

(1,2)

I/O

8-15R

I/O

Control

I/O

Control

I/O

0-7R

BUSY

(1,2)

14L

Address

Decoder

14L

32Kx16

MEMORY

ARRAY

70V27

Address

Decoder

14R

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

14R

SEM

INT

(2)

SEM

(2)

INT

3603 drw 01

NOTES:

BUSY

is an input as a Slave (M/S=V

) and an output as a Master (M/S=V

BUSY

and

INT

are non-tri-state totem-pole outputs (push-pull).

SEPTEMBER 2012

6.01

DSC 3603/12

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