DSPIC33CK256MP202-H/2N datasheet, PDF

DSPIC33CK256MP202-H/2N: DescriptionMicrocontroller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size4MB，644 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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DSPIC33CK256MP202-H/2N Overview

Microcontroller

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	8358206896
package instruction	HQCCN, LCC28,.24SQ,25
Reach Compliance Code	compliant
Country Of Origin	Thailand
ECCN code	3A001.A.2.A
YTEOL	6.5
Address bus width
barrel shifter	YES
bit size	16
boundary scan	YES
maximum clock frequency	64 MHz
External data bus width
Format	FIXED POINT
Integrated cache	NO
Internal bus architecture	SINGLE
JESD-30 code	S-PQCC-N28
length	6 mm
low power mode	YES
Number of DMA channels	4
Number of external interrupt devices	4
Number of terminals	28
Number of timers	1
On-chip data RAM width	8
On-chip program ROM width	8
Maximum operating temperature	150 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HQCCN
Encapsulate equivalent code	LCC28,.24SQ,25
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
RAM (number of words)	24576
ROM programmability	FLASH
Filter level	AEC-Q100
Maximum seat height	0.55 mm
Maximum slew rate	300 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	NO LEAD
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, CONTROLLER

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