DSPIC33EV32GM102T-I/SS datasheet, PDF

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DSPIC33EV32GM102T-I/SS: DescriptionMicrocontroller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size4MB，504 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com

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DSPIC33EV32GM102T-I/SS Overview

Microcontroller

DSPIC33EV32GM102T-I/SS Parametric

Parameter Name	Attribute value
Objectid	7221144063
package instruction	SSOP-28
Reach Compliance Code	compliant
Country Of Origin	Thailand
ECCN code	3A991.A.2
YTEOL	6.5
Has ADC	YES
Address bus width
bit size	16
maximum clock frequency	40 MHz
DAC channel	NO
DMA channel	YES
External data bus width
JESD-30 code	R-PDSO-G28
length	10.2 mm
Number of I/O lines	21
Number of terminals	28
On-chip program ROM width	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
ROM programmability	FLASH
Filter level	TS 16949
Maximum seat height	2 mm
speed	40 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
width	5.3 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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dsPIC33EVXXXGM00X/10X FAMILY

16-Bit, 5V Digital Signal Controllers with

PWM, SENT, Op Amps and Advanced Analog Features

Operating Conditions

• 4.5V to 5.5V, 0°C to +85°C, DC to 70 MIPS

• 4.5V to 5.5V, -40°C to +125°C, DC to 60 MIPS

• 4.5V to 5.5V, -40°C to +150°C, DC to 40 MIPS

PWM

• Up to Six Pulse-Width Modulation (PWM) Outputs

(three generators)

• Primary Master Time Base Inputs allow

Time Base Synchronization from Internal/External

Sources

• Dead Time for Rising and Falling Edges

• 7.14 ns PWM Resolution

• PWM Support for:

- DC/DC, AC/DC, inverters, Power Factor

Correction (PFC) and lighting

- Brushless Direct Current (BLDC), Permanent

Magnet Synchronous Motor (PMSM),

AC Induction Motor (ACIM), Switched

Reluctance Motor (SRM)

- Programmable Fault inputs

- Flexible trigger configurations for

Analog-to-Digital conversion

- Supports PWM lock, PWM output chopping

and dynamic phase shifting

Core: 16-Bit dsPIC33E CPU

•

Code-Efficient (C and Assembly) Architecture

16-Bit Wide Data Path

Two 40-Bit Wide Accumulators

Single-Cycle (MAC/MPY) with Dual Data Fetch

Single-Cycle, Mixed-Sign MUL plus Hardware

Divide

32-Bit Multiply Support

Intermediate Security for Memory:

- Provides a Boot Flash Segment in addition to

the existing General Flash Segment

Error Code Correction (ECC) for Flash

Added Two Alternate Register Sets for Fast

Context Switching

•

Clock Management

Internal, 15% Low-Power RC (LPRC) – 32 kHz

Internal, 1% Fast RC (FRC) – 7.37 MHz

Internal, 10% Backup FRC (BFRC) – 7.37 MHz

Programmable PLLs and Oscillator Clock Sources

Fail-Safe Clock Monitor (FSCM)

Additional FSCM Source (BFRC), Intended to

Provide a Clock Fail Switch Source for the

System Clock

• Independent Watchdog Timer (WDT)

• System Windowed Watchdog Timer (DMT)

• Fast Wake-up and Start-up

•

Advanced Analog Features

• ADC module:

- Configurable as 10-bit, 1.1 Msps with

four S&H or 12-bit, 500 ksps with one S&H

- Up to 36 analog inputs

• Flexible and Independent ADC Trigger Sources

• Up to Four Op Amp/Comparators with Direct

Connection to the ADC module:

- Additional dedicated comparator and

7-bit Digital-to-Analog Converter (DAC)

- Two comparator voltage reference outputs

- Programmable references with 128 voltage

points

- Programmable blanking and filtering

• Charge Time Measurement Unit (CTMU):

- Supports mTouch

capacitive touch sensing

- Provides high-resolution time

measurement (1 ns)

- On-chip temperature measurement

- Temperature sensor diode

- Nine sources of edge input triggers (CTED1,

CTED2, OCPWM, TMR1, SYSCLK, OSCLK,

FRC, BFRC and LPRC)

Power Management

• Low-Power Management modes (Sleep, Idle

and Doze)

• Power Consumption Minimized Executing

NOP

String

• Integrated Power-on Reset (POR) and Brown-out

Reset (BOR)

• 0.5 mA/MHz Dynamic Current (typical)

• 50 µA at +25°C I

Current (typical)



2013-2018 Microchip Technology Inc.

DS70005144G-page 1

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