IRFD9110
Data Sheet
January 2002
0.7A, 100V, 1.200 Ohm, P-Channel Power
MOSFET
This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17541.
Features
• 0.7A, 100V
• r
DS(ON)
= 1.2
00Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
Symbol
D
Ordering Information
PART NUMBER
IRFD9110
PACKAGE
HEXDIP
BRAND
IRFD9110
G
S
NOTE: When ordering, use the entire part number.
Packaging
HEXDIP
DRAIN
GATE
SOURCE
©2002 Fairchild Semiconductor Corporation
IRFD9110 Rev. B
IRFD9110
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
IRFD9110
-100
-100
-0.7
-3.0
±
20
1.0
0.008
190
-55 to 150
300
260
UNITS
V
V
A
A
V
W
W/
o
C
mJ
o
C
o
C
o
C
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
Drain to Gate Voltage (R
GS
= 20k
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Dissipation Derating Factor (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J,
T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
PARAMETER
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
I
DSS
I
D(ON)
I
GSS
r
DS(ON)
gfs
t
d(ON)
t
r
t
d(OFF)
t
f
Q
g(TOT)
Q
gs
Q
gd
C
ISS
C
OSS
C
RSS
L
D
Measured From the Drain
Lead, 2mm (0.08in) From
Package to Center of Die
Measured From the
Source Lead, 2mm
(0.08in) From Header to
Source Bonding Pad
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
D
L
D
G
L
S
S
TEST CONDITIONS
I
D
= -250
µ
A, V
GS
= 0V, (Figure 9)
V
GS
= V
DS
, I
D
= -250
µ
A
V
DS
= Rated BV
DSS
, V
GS
= 0V
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V, T
C
= 125
o
C
V
DS
> I
D(ON)
x r
DS(ON)MAX,
V
GS
= -10V,
(Figure 6)
V
GS
=
±
20V
I
D
= -0.3A, V
GS
= -10V, (Figures 8)
V
DS
≤
50V, I
D
= -0.6A, (Figure 11)
V
DD
= 0.5 x Rated BV
DSS,
I
D
= -0.7A, R
G
= 9.1
Ω
,
V
GS
=-10V, (Figures 16, 17),
R
L
= 70
Ω
for V
DSS
= 50V
R
L
= 56
Ω
for V
DSS
= 40V
MOSFET Switching Times are Essentially
Independent of Operating Temperature
V
GS
= -10V, I
D
= -0.7A, V
DS
= 0.8V x Rated BV
DSS,
(Figures 13, 18, 19) Gate Charge is
Essentially Independent of Operating
Temperature
V
DS
= -25V, V
GS
= 0V, f = 1MHz, (Figure 10)
MIN
-100
-2
-
-
-0.7
-
-
0.59
-
-
-
-
-
-
-
-
-
-
-
TYP
-
-
-
-
-
-
1.000
0.88
15
30
20
20
11
5.7
5.3
180
85
30
4.0
MAX
-
-4
-25
-250
-
±
100
1.200
-
30
60
40
40
15
-
-
-
-
-
-
UNITS
V
V
µ
A
µ
A
A
nA
Ω
S
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
nH
On-State Drain Current (Note 2)
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge
Gate to Drain “Miller” Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Internal Drain Inductance
Internal Source Inductance
L
S
-
6.0
-
nH
Thermal Resistance Junction to Ambient
©2002 Fairchild Semiconductor Corporation
R
θ
JA
Typical Socket Mount
-
-
120
o
C/W
IRFD9110 Rev. B
IRFD9110
Source to Drain Diode Specifications
PARAMETER
Continuous Source to Drain Current
Pulse Source to Drain Current
(Note 3)
SYMBOL
I
SD
I
SDM
TEST CONDITIONS
Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Diode
G
D
MIN
-
-
TYP
-
-
MAX
-0.7
-3.0
UNITS
A
A
S
Source to Drain Diode Voltage (Note 2)
Reverse Recovery Time
Reverse Recovery Charge6466
NOTES:
V
SD
t
rr
Q
RR
T
J
= 25
o
C, I
SD
= -0.7A, V
GS
= 0V, (Figure 12)
T
J
= 150
o
C, I
SD
= -0.7A, dI
SD
/dt = 100A/
µ
s
T
J
= 150
o
C, I
SD
= -0.7A, dI
SD
/dt = 100A/
µ
s
-
-
-
-
120
6.0
-1.5
-
-
V
ns
µ
C
2. Pulse test: pulse width
≤
300
µ
s, duty cycle
≤
2%.
3. V
DD
= 25V, starting T
J
= 25
o
C, L = 582mH, R
G
= 25
Ω,
peak I
AS
= 0.7A. See Figures 14, 15.
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
0.8
Unless Otherwise Specified
-1.0
I
D,
DRAIN CURRENT (A)
0
25
50
75
100
125
T
A
, AMBIENT TEMPERATURE (
o
C)
150
-0.8
-0.6
0.6
0.4
-0.4
0.2
0.0
-0.2
0
25
125
50
75
100
T
A
, AMBIENT TEMPERATURE (
o
C)
150
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
-5
10µs
I
D
, DRAIN CURRENT (A)
1
100µs
1ms
-4
I
D
, DRAIN CURRENT (A)
V
GS
= -10V
V
GS
= -9V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10ms
0.1
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
T
C
= 25
o
C
T
J
= MAX RATED
100ms
-3
V
GS
= -8V
-2
V
GS
= -7V
V
GS
= -6V
V
GS
= -5V
-1
0.01
1
DC
0
10
100
0
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-10
-20
-30
-40
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-50
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA
FIGURE 4. OUTPUT CHARACTERISTICS
©2002 Fairchild Semiconductor Corporation
IRFD9110 Rev. B
IRFD9110
Typical Performance Curves
-5
I
D(ON)
, ON-STATE DRAIN CURRENT (A)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
I
D
, DRAIN CURRENT (A)
-4
V
GS
= -10V
V
GS
= -9V
Unless Otherwise Specified
(Continued)
-12.0
V
DS
> I
D(ON)
x r
DS(ON)
PULSE DURATION = 80µs
-9.6 DUTY CYCLE = 0.5% MAX
-3
V
GS
= -8V
-7.2
T
J
= 125
o
C
-4.8
T
J
= 25
o
C
T
J
= -55
o
C
-2.4
-2
V
GS
= -7V
V
GS
= -6V
V
GS
= -5V
-1
0
0
-2
-4
-6
-8
-10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
0
0
-2
-4
-6
-8
-10
V
GS
, GATE TO SOURCE VOLTAGE (V)
FIGURE 5. SATURATION CHARACTERISTICS
5
2µs PULSE TEST
4
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
2.5
FIGURE 6. TRANSFER CHARACTERISTICS
DRAIN TO SOURCE ON RESISTANCE (Ω)
V
GS
= -10V, I
D
= -0.3A
PULSE DURATION = 80µs
2.0 DUTY CYCLE = 0.5% MAX
3
1.5
2
V
GS
= -10V
V
GS
= -20V
1.0
1
0.5
0
0
-1
-2
-3
0
-40
I
D
, DRAIN CURRENT (A)
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
NOTE: Heating effect of 2µs is minimal.
FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 8. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
1.25
I
D
= 250µA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.15
C, CAPACITANCE (pF)
500
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
≈
C
DS
+ C
GD
400
1.05
300
C
ISS
200
0.95
0.85
100
C
OSS
C
RSS
0.75
-40
0
40
80
120
160
0
0
-10
T
J
, JUNCTION TEMPERATURE (
o
C)
-30
-40
-20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-50
FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
©2002 Fairchild Semiconductor Corporation
IRFD9110 Rev. B
IRFD9110
Typical Performance Curves
2.5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
Unless Otherwise Specified
(Continued)
-100
T
J
= -55
o
C
I
SD
, DRAIN CURRENT (A)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
g
fs,
TRANSCONDUCTANCE (S)
2.0
T
J
= 25
o
C
T
J
= 125
o
C
-10
T
J
= 150
o
C
1.5
1.0
-1.0
T
J
= 25
o
C
0.5
0
0
-1.2
-2.4
-3.6
-4.8
-6.0
I
D
, DRAIN CURRENT (A)
-0.1
-0.4
-0.6
-0.8
-1.4
-1.0
-1.2
-1.6
V
SD
, SOURCE TO DRAIN VOLTAGE (V)
-1.8
FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE
5
I
D
= -0.7A
V
GS
, GATE TO SOURCE (V)
0
-5
-10
V
DS
= -20V
V
DS
= -50V
V
DS
= -80V
-15
-20
0
2
4
6
8
Q
g(TOT)
, TOTAL GATE CHARGE (nC)
10
FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Test Circuits and Waveforms
V
DS
t
AV
L
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
R
G
0
-
+
V
DD
V
DD
0V
V
GS
DUT
t
P
I
AS
0.01Ω
I
AS
t
P
BV
DSS
V
DS
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
©2002 Fairchild Semiconductor Corporation
IRFD9110 Rev. B
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