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SG3225EEN100.000000M-CJGA0

Description
LVPECL Output Clock Oscillator, 100MHz Nom, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size1MB,21 Pages
ManufacturerSeiko Epson Corporation
Environmental Compliance
Download Datasheet Parametric View All

SG3225EEN100.000000M-CJGA0 Overview

LVPECL Output Clock Oscillator, 100MHz Nom, SMD, 6 PIN

SG3225EEN100.000000M-CJGA0 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid145225422252
package instructionLCC4,.09X.12,69/53
Reach Compliance Codeunknown
YTEOL6.96
Other featuresENABLE/DISABLE FUNCTION
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
Installation featuresSURFACE MOUNT
Number of terminals6
Nominal operating frequency100 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
Output load50 OHM
Encapsulate equivalent codeLCC4,.09X.12,69/53
physical size3.2mm x 2.5mm x 1.0mm
longest rise time0.35 ns
Maximum slew rate60 mA
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Low Phase Jitter Crystal Oscillator: SG3225 / 5032 / 7050EEN
Features
Crystal oscillator (SPXO)
Frequency range (fo): 25 MHz to 500 MHz
LVPECL
Output:
2.5 V Typ. / 3.3 V Typ.
Supply voltage:
Operating temperature: -40 ºC to +105 ºC
50 fs Typ. (fo = 156.25 MHz)
Low phase jitter:
SG3225EEN
SG5032EEN
SG7050EEN
(3.2
×
2.5
×
1.05 mm) (5.0
×
3.2
×
1.3 mm) (7.0
×
5.0
×
1.5 mm)
Applications
Network equipment (Router, Switch, Optical module, etc.)
Data center
Test and Measurement Equipment, Factory Automation
High Speed Converters like ADC and DAC
Description
5G will increase the communication traffic exponentially. A 5G communication network requires high-speed
and wide-band, while keeping the noise level to a minimum. This can be achieved with a high frequency
low jitter reference clock for the communication equipment. Using the above XO, customers can input a high
frequency reference (up to 500 MHz) with extremely low phase jitter and power, from a fundamental mode
crystal to achieve excellent phase noise.
Outline Drawing and Terminal Assignment
SG7050EEN
SG5032EEN
Typical Performance
Phase Noise (fo = 156.25 MHz, V
CC
= 3.3 V)
Phase Jitter (12 kHz to 20 MHz): 50 fs Typ.
SG3225EEN
Phase Noise (fo = 491.52 MHz, V
CC
= 3.3 V)
Pin
1
2
3
4
5
6
Connection
OE
N.C. (Open or V
CC
)
GND
OUT
OUT
V
CC
Phase Jitter (12 kHz to 20 MHz): 20 fs Typ.
Page 1 / 21
Spec No : SGxxxxEEN_E_Ver1.13

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