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LPC2923FBD100

Description
IC 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100, Microcontroller
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size551KB,84 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance  
Download Datasheet Parametric View All

LPC2923FBD100 Overview

IC 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100, Microcontroller

LPC2923FBD100 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Objectid2041943854
Parts packaging codeQFP
package instruction14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100
Contacts100
Reach Compliance Codeunknown
ECCN code3A991.A.2
Has ADCYES
bit size32
maximum clock frequency125 MHz
DAC channelNO
DMA channelYES
JESD-30 codeR-PQFP-G100
JESD-609 codee3
length14 mm
Humidity sensitivity level3
Number of I/O lines60
Number of terminals100
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
PWM channelYES
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Package shapeRECTANGULAR
Package formFLATPACK, LOW PROFILE, FINE PITCH
Certification statusNot Qualified
ROM programmabilityFLASH
Maximum seat height1.6 mm
speed125 MHz
Maximum supply voltage1.89 V
Minimum supply voltage1.71 V
Nominal supply voltage1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
width14 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER, RISC
LPC2921/2923/2925
ARM9 microcontroller with CAN, LIN, and USB
Rev. 03 — 14 April 2010
Product data sheet
1. General description
The LPC2921/2923/2925 combine an ARM968E-S CPU core with two integrated TCM
blocks operating at frequencies of up to 125 MHz, Full-speed USB 2.0 device controller,
CAN and LIN, up to 40 kB SRAM, up to 512 kB flash memory, two 10-bit ADCs, and
multiple serial and parallel interfaces in a single chip targeted at consumer, industrial, and
communication markets. To optimize system power consumption, the
LPC2921/2923/2925 has a very flexible Clock Generation Unit (CGU) that provides
dynamic clock gating and scaling.
2. Features and benefits
ARM968E-S processor running at frequencies of up to 125 MHz maximum.
Multilayer AHB system bus at 125 MHz with four separate layers.
On-chip memory:
Two Tightly Coupled Memories (TCM), 16 kB Instruction (ITCM) and 16 kB Data
TCM (DTCM).
On the LPC2925, two separate internal Static RAM (SRAM) instances, 16 kB each.
On the LPC2923 and LPC2921, one 16 kB SRAM block.
8 kB ETB SRAM, also usable for code execution and data.
Up to 512 kB high-speed flash-program memory.
16 kB true EEPROM, byte-erasable/programmable.
Dual-master, eight-channel GPDMA controller on the AHB multilayer matrix which can
be used with the
Serial Peripheral Interface (SPI)
interfaces and the UARTs, as well as
for memory-to-memory transfers including the TCM memories.
Serial interfaces:
USB 2.0 full-speed device controller with dedicated DMA controller and on-chip
device PHY.
Two-channel CAN controller supporting FullCAN and extensive message filtering.
Two LIN master controllers with full hardware support for LIN communication. The
LIN interface can be configured as UART to provide two additional UART
interfaces.
Two 550 UARTs with 16-byte Tx and Rx FIFO depths, DMA support, and
RS-485/EIA-485 (9-bit) support.
Three full-duplex Q-SPIs with four slave-select lines; 16 bits wide; 8 locations deep;
Tx FIFO and Rx FIFO.
Two I
2
C-bus interfaces.
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