Changes to Ordering Guide .......................................................... 19
7/08—Revision 0: Initial Version
Rev. G | Page 2 of 20
Data Sheet
SPECIFICATIONS
ADP121
V
IN
= (V
OUT
+ 0.5 V) or 2.3 V, whichever is greater; EN = V
IN
; I
OUT
= 10 mA; C
IN
= C
OUT
= 1 µF; T
A
= 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
Symbol
V
IN
I
GND
Conditions
T
J
= −40°C to +125°C
I
OUT
= 0 µA
I
OUT
= 0 µA, T
J
= −40°C to +125°C
I
OUT
= 10 mA
I
OUT
= 10 mA, T
J
= −40°C to +125°C
I
OUT
= 150 mA
I
OUT
= 150 mA, T
J
= −40°C to +125°C
EN = GND
EN = GND, T
J
= −40°C to +125°C
I
OUT
= 10 mA
100 µA < I
OUT
< 150 mA,
V
IN
= (V
OUT
+ 0.5 V) to 5.5 V
100 µA < I
OUT
< 150 mA,
V
IN
= (V
OUT
+ 0.5 V) to 5.5 V
T
J
= −40°C to +125°C
V
IN
= (V
OUT
+ 0.5 V) to 5.5 V, I
OUT
= 1 mA
T
J
= −40°C to +125°C
I
OUT
= 1 mA to 150 mA
I
OUT
= 1 mA to 150 mA
T
J
= −40°C to +125°C
V
OUT
= 3.3 V
I
OUT
= 10 mA
I
OUT
= 10 mA, T
J
= −40°C to +125°C
I
OUT
= 150 mA
I
OUT
= 150 mA, T
J
= −40°C to +125°C
I
OUT
= 10 mA
I
OUT
= 10 mA, T
J
= −40°C to +125°C
I
OUT
= 150 mA
I
OUT
= 150 mA, T
J
= −40°C to +125°C
V
OUT
= 3.3 V
Min
2.3
Typ
11
21
15
29
30
40
0.1
−1
−2
−3
1.5
+1
+2
+3
Max
5.5
Unit
V
µA
µA
µA
µA
µA
µA
µA
µA
%
%
%
SHUTDOWN CURRENT
FIXED OUTPUT VOLTAGE ACCURACY
I
GND-SD
V
OUT
REGULATION
Line Regulation
Load Regulation
1
∆V
OUT
/∆V
IN
∆V
OUT
/∆I
OUT
−0.03
0.001
+0.03
%/V
%/mA
%/mA
0.005
DROPOUT VOLTAGE
2
TSOT
V
DROPOUT
8
12
120
180
6
9
90
135
160
120
225
150
15
1.2
0.4
0.05
1
2.25
1.5
120
65
52
40
350
WLCSP
START-UP TIME
3
CURRENT-LIMIT THRESHOLD
4
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
EN INPUT
EN Input Logic High
EN Input Logic Low
EN Input Leakage Current
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
OUTPUT NOISE
T
START-UP
I
LIMIT
TS
SD
TS
SD-HYS
V
IH
V
IL
V
I-LEAKAGE
UVLO
UVLO
RISE
UVLO
FALL
UVLO
HYS
OUT
NOISE
mV
mV
mV
mV
mV
mV
mV
mV
µs
mA
°C
°C
V
V
µA
T
J
rising
2.3 V ≤ V
IN
≤ 5.5 V
2.3 V ≤ V
IN
≤ 5.5 V
EN = VIN or GND
EN = VIN or GND, T
J
= −40°C to +125°C
10 Hz to 100 kHz, V
IN
= 5 V, V
OUT
= 3.3 V
10 Hz to 100 kHz, V
IN
= 5 V, V
OUT
= 2.5 V
10 Hz to 100 kHz, V
IN
= 5 V, V
OUT
= 1.2 V
V
V
mV
µV rms
µV rms
µV rms
Rev.
G
| Page 3 of 20
ADP121
Parameter
POWER SUPPLY REJECTION RATIO
Symbol
PSRR
Conditions
10 kHz, V
IN
= 5 V, V
OUT
= 3.3 V
10 kHz, V
IN
= 5 V, V
OUT
= 2.5 V
10 kHz, V
IN
= 5 V, V
OUT
= 1.2 V
Min
Typ
60
66
70
Data Sheet
Max
Unit
dB
dB
dB
1
2
Based on an end-point calculation using 1 mA and 100 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.3 V.
3
Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
4
Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.
RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITORS
Table 2.
Parameter
INPUT AND OUTPUT CAPACITOR
1
Minimum Input and Output Capacitance
Capacitor ESR
1
Symbol
C
MIN
R
ESR
Conditions
T
A
= −40°C to +125°C
T
A
= −40°C to +125°C
Min
0.70
0.001
Typ
Max
Unit
µF
Ω
1
The minimum input and output capacitance should be greater than 0.70 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev.
G
| Page 4 of 20
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
VOUT to GND
EN to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
−0.3 V to +6.5 V
−0.3 V to VIN
−0.3 V to +6.5 V
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
ADP121
Junction-to-ambient thermal resistance, θ
JA
, is based on
modeling and calculation using a four-layer board. The
junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ
JA
may vary, depending
on PCB material, layout, and environmental conditions. The
specified values of θ
JA
are based on a 4-layer, 4” × 3”, circuit
board. Refer to JESD 51-7 and JESD 51-9 for detailed
information on the board construction. For additional
information, see AN-617 Application Note,
MicroCSP
TM
Wafer Level Chip Scale Package.
Ψ
JB
is the junction-to-board thermal characterization parameter
measured in °C/W. Ψ
JB
is based on modeling and calculation
using a four-layer board. The JESD51-12
Guidelines for Reporting
and Using Package Thermal Information
states that thermal
characterization parameters are not the same as thermal
resistances. Ψ
JB
measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θ
JB
. Therefore, Ψ
JB
thermal paths include
convection from the top of the package as well as radiation
from the package, factors that make Ψ
JB
more useful in real-
world applications. Maximum T
J
is calculated from the board
temperature (T
B
) and P
D
using the following formula:
T
J
=
T
B
+ (P
D
× Ψ
JB
)
Refer to JESD51-8 and JESD51-12 for more detailed
information about Ψ
JB
.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP121 can be damaged when the junction
temperature limits are exceeded. Monitoring the ambient
temperature does not guarantee that the junction temperature
(T
J
) is within the specified temperature limits. In applications
with high power dissipation and poor thermal resistance, the
maximum ambient temperature may have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. T
J
of the device is dependent on
the ambient temperature (T
A
), the power dissipation of the
device (P
D
), and the junction-to-ambient thermal resistance of
the package (θ
JA
). T
J
is calculated from T
A
and P
D
using the
following formula:
T
J
=
T
A
+ (P
D
× θ
JA
)
THERMAL RESISTANCE
θ
JA
and Ψ
JB
are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
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