EEWORLDEEWORLDEEWORLD

Part Number

Search

SIT9365AI-1B2-30N122.880000E

Description
LVPECL Output Clock Oscillator,
CategoryPassive components    oscillator   
File Size805KB,16 Pages
ManufacturerSiTime
Environmental Compliance
Download Datasheet Parametric View All

SIT9365AI-1B2-30N122.880000E Overview

LVPECL Output Clock Oscillator,

SIT9365AI-1B2-30N122.880000E Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid7178041263
Reach Compliance Codecompliant
Country Of OriginMalaysia, Taiwan, Thailand
YTEOL7.04
Other featuresCOMPLEMENTARY OUTPUT
maximum descent time0.29 ns
Frequency Adjustment - MechanicalNO
frequency stability25%
JESD-609 codee4
Installation featuresSURFACE MOUNT
Number of terminals6
Nominal operating frequency122.88 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
Output load50 OHM
Encapsulate equivalent codeSOLCC6,.1,43
physical size3.2mm x 2.5mm x 0.9mm
longest rise time0.29 ns
Maximum supply voltage3.3 V
Minimum supply voltage2.7 V
Nominal supply voltage3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
SiT9365
Description
Standard Frequency Ultra-low Jitter Differential Oscillator
Features
The
SiT9365
is a differential MEMS XO supporting
standard frequencies between 25 MHz and 325 MHz,
and engineered for low-jitter applications. Utilizing
SiTime’s unique DualMEMS
®
temperature sensing and
TurboCompensation
®
technology, the SiT9365 delivers
exceptional dynamic performance by providing
resistance to airflow, thermal gradients, shock and
vibration. This device also integrates multiple on-chip
regulators to filter power supply noise, eliminating the
need for a dedicated external LDO.
The SiT9365 can be factory programmed for specific
combinations of frequency, stability, voltage, and output
signaling. Programmability enables designers to optimize
clock configurations while eliminating long lead times and
customization costs associated with quartz devices
where each frequency is custom built.
Standard frequencies and programmability makes this
device ideal for telecom, networking, and industrial
applications that require a variety of frequencies and
operate in noisy environments.
Refer to
Manufacturing Notes
for proper reflow profile,
tape and reel dimension, and other manufacturing
related information.
32 standard frequencies from 25 MHz to 325 MHz
(For additional frequencies, refer to
SiT9366
and
SiT9367
datasheets)
LVPECL, Low-swing LVPECL, LVDS and HCSL output
signaling
0.1 ps RMS phase jitter (random) for Ethernet applications
Frequency stability as low as ±10 ppm
Wide temperature ranges from -40°C to 105°C
Industry-standard packages: 3.2 x 2.5 mm
2
, 7.0 x 5.0 mm
2
and 5.0 x 3.2 mm
2
package
Applications
10/40/100 Gbps Ethernet, SONET, SATA, SAS,
Fibre Channel
Telecom, networking, instrumentation, storage, servers
Block Diagram
Package Pinout
OE/NC
NC
GND
1
2
3
6
5
4
VDD
OUT-
OUT+
Figure 1. SiT9365 Block Diagram
Figure 2. Pin Assignments (Top view)
(Refer to
Table 7
for Pin Descriptions)
Rev 1.1
20 July 2021
www.sitime.com
[TI recommended course] #Innovation of general-purpose op amp and comparator chips#
//training.eeworld.com.cn/TI/show/course/5674...
eew_jjsnxP TI Technology Forum
Recently, I am doing an experiment on communication between DSP and AD5390. DSP controls AD5390 through SPI bus. I am not familiar with the core of AD5390.
I am currently working on an experiment to connect DSP to AD5390. DSP controls AD5390 through SPI bus. Currently, writing DSP program is not a problem, but I am still having a headache on how to write...
古月123 ADI Reference Circuit
About ADC sampling and Fourier algorithm of FR5969
This is my first time to do Fourier. Now I want to collect 125HZ and 225HZ signals. So what should my sampling frequency and sampling points be? Can you help me calculate it? It would be best if you c...
yingonly2015 Microcontroller MCU
A new year and a new beginning. I wish you all a happy New Year!
I wish you all a happy new year and New Year’s Day! May all your wishes come true in 2022!...
eric_wang Talking
【Project source code】 Analysis of blocking assignment and non-blocking assignment principles
This article and design code were written by FPGA enthusiast Xiao Meige. Without the author's permission, this article is only allowed to be copied and reproduced on online forums, and the original au...
小梅哥 FPGA/CPLD
How do I copy files? Compile error using SHFileOperation
Copy the file. If the file exists, you can set it to overwrite or not. Currently, I use SHFileOperation. The compilation error is: error LNK2019: unresolved external symbol SHFileOperationW referenced...
chen_elppa Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2214  333  1108  1119  100  45  7  23  2  40 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号