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EH1520SJETTS-2.07875MTR

Description
CRYSTAL OSCILLATOR, CLOCK, CMOS OUTPUT
CategoryPassive components    oscillator   
File Size793KB,10 Pages
ManufacturerECLIPTEK
Websitehttp://www.ecliptek.com
Environmental Compliance
Download Datasheet Parametric View All

EH1520SJETTS-2.07875MTR Overview

CRYSTAL OSCILLATOR, CLOCK, CMOS OUTPUT

EH1520SJETTS-2.07875MTR Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid7039734294
Reach Compliance Codenot_compliant
Other featuresTRI-STATE; ENABLE/DISABLE FUNCTION; TR, 14 INCH
maximum descent time6 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
JESD-609 codee3
Installation featuresSURFACE MOUNT
Number of terminals4
Nominal operating frequency2.07875 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVCMOS
Output load30 pF
physical size14.0mm x 9.8mm x 4.7mm
longest rise time6 ns
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry60/40 %
Terminal surfaceMatte Tin (Sn) - with Nickel (Ni) barrier
Ecliptek | EH15 Series Oscillator
http://www.ecliptek.com/oscillators/EH15/
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EH15 Series Oscillator
Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.3Vdc J-Lead 9.8mm x 14.0mm Plastic Surface Mount (SMD)
2011/65 +
2015/863
168 SVHC
Revision F 08/14/2012
Electrical Specifications
Nominal Frequency
1.000MHz to 155.520MHz
Some frequencies within this range may not be available.
Frequency
Tolerance/Stability
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range, Supply Voltage Change, Output Load Change, First Year
Aging at 25°C, Shock, and Vibration)
±100ppm Maximum
±50ppm Maximum
±25ppm Maximum
±20ppm Maximum
0°C to +70°C
-40°C to +85°C
3.3V
DC
±0.3V
DC
No Load
35mA Maximum
2.7V
DC
Minimum, IOH = -8mA
Operating Temperature
Range
Supply Voltage (V
DD
)
Input Current
Output Voltage Logic
High (V
OH
)
Output Voltage Logic Low
(V
OL
)
Duty Cycle
0.5V
DC
Maximum, IOL = +8mA
Measured at 50% of waveform
50 ±10(%)
50 ±5(%)
Measured at 20% to 80% of waveform
6nSec Maximum over Nominal Frequency of 1MHz to 70MHz
4nSec Maximum over Nominal Frequency of 70.000001MHz to 155.52MHz
30pF Maximum over Nominal Frequency of 1MHz to 70MHz
15pF Maximum over Nominal Frequency of 70.000001MHz to 155.52MHz
CMOS
Tri-State (High Impedance)
70% of V
DD
Minimum to enable output, 20% of V
DD
Maximum to disable output, No
Connect to enable output
±250pSec Maximum, ±100pSec Typical
±50pSec Maximum, ±40pSec Typical
Rise Time/Fall Time
Load Drive Capability
Output Logic Type
Pin 1 Connection
Tri-State Input Voltage
(Vih and Vil)
Absolute Clock Jitter
One Sigma Clock Period
Jitter
Aging (at 25°C)
Storage Temperature
Range
±5ppm/year Maximum
-55°C to +125°C
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